Low Frequency 3rd Overtone Crystal Osc

The OP had problems with the power consumption, so it would be preferable to keep the crystal frequency as low as possible, ie. 120 kHz or at most 240/480 kHz.

Can you run a tuning fork crystal at some harmonics ? I don't know. Running a 40 kHz fundamental crystal and then using a tripler to get

120 kHz (symmetrically clipping) might not be a good idea, since any asymmetry will generate even harmonics (60 kHz) what the OP tries to avoid.

In an other post I suggested using a 32768 Hz crystal to discipline a

120 kHz free running oscillator.

One idea to implement this would be to use a low power divide by 512 to get a 64 Hz/15.625 us square wave. Use a CR derivation network to get a short reset pulse to reset the 120 kHz free running oscillator. when the frequencies are exactly matched, during a single 50 Hz period, there are 1875 cycles of the 120 kHz waveform. If the free running oscillator can be maintained between 1874.5 and 1875.5 cycles, think about old TV horizontal and vertical synch issues.

Its also difficult to get a good ratio of reject to accept on the B and C modes. The inductor needs to be modelled well. It makes a big difference to include the correct skin effects.

I have made an extensive set of coil craft inductor models that use one of my special subckts within a subckt to get the correct sqrthx resistance at

45 deg phase for both the series and parallel parasitic resistances.

The libs I have are:

0402DF 0402HL 0603LS 805LS 1008CS

I can send them to anyone them if they email me. I only have the 603 in the SS download.

-- Kevin Aylward

- SuperSpice

unless you have some way to synchronise your clock to the 60kHz, sampling at 120kHz you could hit the zero-crossings, and see no signal

--
This email has not been checked by half-arsed antivirus software

Well f*ck, I was just writing an article about that...

Well, at least mine will have a Javascript converter?

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

Both edges of the clock or a 240 kHz clock.

--

Rick C

Exactly. The simulations I have done with a 200 MHz crystal (don't know where I got the model, but that's what I have, possibly Kevin Aylward some time ago) show power consumption can be pretty low, so maybe it's not as severe a restraint as I thought. I'm not sure how much reducing the power consumption works against stability, but so far the simulations are below 1 uW which is well within a reasonable power budget.

At this point I am not looking to run a crystal at harmonic frequencies anymore. I've been scared off that. Also, I have played with simulations of using a resonant filter to derive odd harmonics from a square wave and that looks pretty good.

The 32768 will be there, but I need a 120/240 kHz clock from some source. If not a crystal, what then?

I'm confused. A 50 Hz period will be 2400 cycles of 120 kHz, no?

What is a CR derivation network? You mean an RC as in resistor capacitor as in an edge pulse? But the counts are mixed up. Dividing the 120,000 by 64 does give 1,875, so I reckon the 50 Hz was the part mixed up and should have been 64 Hz.

I think I would just count for 1 second and get some better resolution. The correction rate doesn't need to be so often if the adjustment is proportional to get a reasonable lock rate.

I thought I had found a really, really nice clock chip with a 32.768 kHz output correctable to just a couple ppm. But the correction is done by dropping/adding clock pulses and only affects the time of day info, not the 32.768 kHz. So the search continues. It would have been a great chip for this including nearly everything required of the truly low power function.

sources, accuracy, stability and aging.

--

Rick C

Feel free to use my models in it.

I have an example of the skin effect model and how its constructed in SS. Its

SkinEffectResistance.sss

.SUBCKT SkinEffectResistance_XN !0_A !1_B FMAX=110M K=0.49

• _SS_Symbol [Functional.ssm] [SkinEffectResister]

*

• V!1 !1_B B 0 V!0 !0_A A 0

• skin effect impedance variation with sqrt(F)

• set FMAX to > max frequency of operation .param FX={FMAX/100} .param L={0.1*K/sqrt(FX)} .param R={10*K*sqrt(FX)}

• R8 Node8 A {R/128} L8 Node8 B {L*128} L1 Node1 B {L} R1 Node1 A {R} R6 Node6 A {R/32} R5 Node5 A {R/16} R4 Node4 A {R/8} R3 Node3 A {R/4} R2 Node2 A {R/2} R0 B A {R} R7 Node7 A {R/64} L2 Node2 B {L*2} L3 Node3 B {L*4} L4 Node4 B {L*8} L5 Node5 B {L*16} L6 Node6 B {L*32} L7 Node7 B {L*64}

• .ENDS

Example Coilcraft Inductor:

.SUBCKT CoilCraft0605LS-78 1 2

*

• (c) 2016 - AnaSoft Ltd/Kevin Aylward -
  formatting link

*

• Inductor uses a LR ladder network with interleaved poles and zeros

• to produce a skin effect impedance variation with sqrt(F) @ 45 degs

• F0 is a number to characterise the maximum frequency for which the approximation holds

• Typically F0 should be of the order of 5 times the resonant/max frequency of the inductor

• .param l=76.2n .param c=2.08p .param r2esr=0.785 .param r1c=2010

* *

• R2 1 3 {r2esr} XVAR1 3 4 RSq1 L 4 2 {l} XVAR2 3 2 RSq2 C 3 5 {c} R1 5 2 {r1c} .SUBCKT RSq1 A B

• .param F0=2.5G .param K1=1e-8 .param FX={F0/100} .param L={0.1*K1/sqrt(FX)} .param R={10*K1*sqrt(FX)}

• R8 Node8 A {R/128} L8 Node8 B {L*128} L1 Node1 B {L} R1 Node1 A {R} R6 Node6 A {R/32} R5 Node5 A {R/16} R4 Node4 A {R/8} R3 Node3 A {R/4} R2 Node2 A {R/2} R0 B A {R} R7 Node7 A {R/64} L2 Node2 B {L*2} L3 Node3 B {L*4} L4 Node4 B {L*8} L5 Node5 B {L*16} L6 Node6 B {L*32} L7 Node7 B {L*64}

• .ENDS

.SUBCKT RSq2 A B

• .param F0=2.5G .param K2=0.0653 .param FX={F0/100} .param L2={0.1*K2/sqrt(FX)} .param R2={10*K2*sqrt(FX)}

• R8 Node8 A {R2/128} L8 Node8 B {L2*128} L1 Node1 B {L2} R1 Node1 A {R2} R6 Node6 A {R2/32} R5 Node5 A {R2/16} R4 Node4 A {R2/8} R3 Node3 A {R2/4} R2 Node2 A {R2/2} R0 B A {R2} R7 Node7 A {R2/64} L2 Node2 B {L2*2} L3 Node3 B {L2*4} L4 Node4 B {L2*8} L5 Node5 B {L2*16} L6 Node6 B {L2*32} L7 Node7 B {L2*64}

• .ENDS

.ends

This should also run in LTSpice.

I have just noticed, that the model 603 models I alluded to in the current SS install are not the correct sqrthz versions, so if you want the correct set of models, email me.

-- Kevin Aylward

- SuperSpice

The 1972 Motorola "McMos Handbook" has a 55 page chapter "Timepiece electronics" dealing with crystal characteristics, oscillator topology, frequency divider chains etc. One graph shows a crystal oscillator built around a CMOS inverter consuming 3-4 uA at 500 kHz

I guess this chapter might appear in later editions also, perhaps including better components.

Yes.

I am not suggest dividing the LC or RC oscillator 120/240 kHz frequency, since it would consume a lot of power. Instead divide the

32768 Hz by 512 to get 64 Hz which is also a submultiple of 120000 Hz.

Reset the 120 kHz oscillator 64 times a second, in which the 120 kHz oscillator has generated 1875 cycles.

Dividing the 120 or 240 kHz oscillator and then phase locking it to some division product from the 32768 crystal would of course work, but the high frequency divider would consume more power.

It won't be so much. In particular the digital logic will all be in an FPGA which is *very* low power. The expensive part is driving I/O pins which are roughly 10 pF. An input will be sampled at the higher clock rate and processed. If I process it at 240 kHz (relatively exact) the processing is much, much simpler. If it is sampled at any other rate, the processing grows by an order of magnitude. I don't know if that will be a significant power level or not. I should do some tests to see what power levels I end up with.

Still, the oscillator needs to be trimmable to a reference to achieve about 20 ppm in the sample clock. I'm not as concerned about phase jitter or other features of the clock, but if the frequency is off by much more than 20 ppm, the measurement will degrade significantly. 10 ppm would be even better.

I don't see problems with the frequency locking of the higher speed clock to the 32.768 kHz reference. I just don't see how to create a reasonably stable higher speed clock if I can't get a crystal. I suppose an LC resonant oscillator could do the job if it is locked to the reference with a fast control cycle time.

--

Rick C

Alright, I'll take a look!

Hmm, I think mine is better... You did a straight geometric network, which works nicely, but not optimally. It's very close for a pure R+L network (though still not perfect). For an R- or L-terminated network (i.e., with parallel HF and LF asymptotes: both resistive, or both inductive), it's not as good, and needs more fudging to get good.

I put (way too much :) ) optimization into a very accurate Warburg element, that uses 5 inductors and 6 resistors to cover 4 decades (frequency) with

1.3% peak error. The final coefficients don't seem to have any obvious values; probably ridiculous polynomial roots. (The closest I got by hand was a cubic correction to the geometric series.)

Teasers for the article-in-progress:

(Normalized to be symmetrical around 1 ohm, 1Hz, and of course easily shifted around as needed.)

Like you, I'm using two, one for each RVAR component.

I didn't find it was necessary, or important, to capture the k4 and k5 parameters; it looks like you had a similar experience?

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

Would an XOR with an rc work as a frequency doubler?

I update the install over the weekend, so it now includes all the coilcraft libs.

Probably.

Well, its all approximation in simulations.

There is a SS example plotting what range the 45 deg and 10db/dec are reasonable valid.

The motivation was to get better fit to an inductor model than without it at all, and not use Laplace transforms!

Colicraft have some (PSpice) models that do that, but simulation wise, its a no no. It can result in massive slowdowns because it has to use additional non-spice solving methods.

I really do try and minimise the amount of work I have to do.

I will have a look

I just modelled with the data that was in the coilcraft data sheets.

-- Kevin Aylward

- SuperSpice

Not very well in this case.

--

Rick C

Doesn't work in the presence of phase shifts. Stuff at the sampling frequency aliases down to DC regardless of the phase.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

That's because of the parallel capacitance cutting down the inductive range. You can resonate it away with a parallel inductor, which restores the pulling range.

Tuning forks are basically mass-spring resonators, so their overtones probably aren't near harmonics of the fundamental. By analogy, the organ-pipe resonances of a beer bottle aren't near harmonics of the Helmholtz (mass-spring) resonance. (The Helmholtz resonance is the low frequency tone you get by blowing over the mouth of the bottle.)

Once you get outside the inductive region things deteriorate rapidly.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

But some phases alias stronger than others... :) If it's in phase, it's DC

+/-, if it's out of phase (just landing on the zero crossing), it's zero. (Zero is of course still DC, so not to say you aren't "technically correct", the best kind of correct. :) )

Nice thing about double sampling: because that puts the interference back in the Nyquist window (just barely), it can be filtered digitally with any network that nulls Fs/2, like a 1-1 or 1-2-2-1 FIR filter.

Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com

Quadrature (I/Q) demodulation should solve this problem.

If you can lock into th signal, quadrature locking of Q will ensure that the I channel doesn't cancel the data.

not surprising since IQ sampling is basically equivalent to sampling at twice the rate

This part was resolved a long time ago. That's why the sampling will be

240 kHz with filters to resolve real and imaginary parts at 120 kHz. The multiplies are all 1, -1 and 0 so no actual multiplies. Sum the complex results over a time period and you get a *very* narrow band filter with complex results giving both amplitude and relative phase.

That's why I prefer a 120 or 240 kHz crystal. We'll see what I end up with.

--

Rick C