A really good Spice model would help here... or some measurements! Your circuit is essentially jamming current into the emitter, so Vbe is not fixed. With a high-beta transistor (BCX71K maybe) and lots of C-E voltage, it should be pretty good.
I wonder what the effective source impedance would be for a current source like this woth, say, 5 volts Vce and 5 volts across the emitter resistor. Spare time project.
I see that the curves all cross near 10 mA, but it's hard to tell how much V_F moves with temperature near there. I'd expect some quadratic-looking curve, but who knows, we might get lucky.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
The emitter resistor provides negative feedback, which stiffens the collector a lot, against both V_BE and Early effect. How much depends on how much feedback you apply, and as John points out, the nonlinear capacitance is much harder to compensate for. Using a really small transistor (e.g. a BFG25AW) helps a lot because the capacitance is very small anyway, but unfortunately there aren't any good PNP candidates that I know of.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
I don't see how your bootstrap can be improved upon- all the parasitics are effectively filtered with the bootstrapped constant voltage derived from a heavily bypassed precision active zener and the buffer is there too. You're not even close to stressing the AD8014 working at less than 4% its slew rate and 5% of its BW.
OK, ok, I'll reveal a secret. Put a 1K ferrite bead in the collector of a slow, high-beta transistor like a BCX71K. That will decouple the collector capacitance from the ramp cap. Really helps.
I need serious linearity and repeatability, and low temperature effects, from this ramp. It's being used to control some downstream timing that has to be accurate to 200 ps or better. So everything has to be very quantitative.
So, instead of 'a resistor', use a very quantitative resistor. And instead of 'a capacitor' use a very quantitative capacitor. Was that answer supposed to mean something?
Ferrite beads are usually specified by their impedance at 100 MHz. Values range from 10s of ohms to a couple K. They are magical parts, sort of like putting your finger on a circuit.
Yes. You don't owe me anything. But you don't look anything like I expected.
Pretty high. I used a circuit like this for an ADC.. I was prepared to provide a parabolic linearization correction, but it wasn't necessary.
Best regards, Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
IIRC, the voltage reference noise is a few uV RMS 0.1~10Hz .. but it's not supplying much current, and into not much resistance.
Best regards, Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
It's a DC effect--if you look at a transistor datasheet, you'll see a family of curves of I_C vs V_CE for given values of I_B and/or V_BE.
An ideal transistor would have I_C independent of V_CE (i.e. the curves would be flat) but real ones have some tilt--I_C increases when you jack up V_CE. That's due to Early effect.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Early effect is best visualized on a curve tracer. All the traces intersect at the Early voltage (negative for a NPN). An you correctly capitalized Early.
On a sunny day (Fri, 08 Apr 2011 17:09:02 -0400) it happened Phil Hobbs wrote in :
OK, so we use the circuit upside down with a negative ramp and a NPN :-)
Here is an other ramp generator, but this one is for only 50 Hz,
formatting link
diagram is at bottom page, the FET is the current source, and discharges C6 to a low voltage, Q1 is the PNP switch that charges C8 fast again. World upside down, now the PNP is the 'discharge', that actually is the charge, Never 'designed' this, just soldered it together from the subconcious... Fun :-) Would this work at 20 nS ? dunno.
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