I am in a bit of a dilemma. We use ISA architecture here where I work that I would like to use an FPGA solution with. The only issue I am having is that all the FPGAs that have the resources to do what I need it to do run at 3.3V. I was wondering what the threshold for a logical HIGH and LOW signal voltages were. If I drive a signal (IO16 or Data bus) with the FPGA's 3.3V high, is that high enough to merit a HIGH voltage on the output?
Thanks, Matt