On a sunny day (Mon, 6 Aug 2018 14:17:44 -0700 (PDT)) it happened AntonF wrote in :
Having wound and using several push pull transformers, you want the UNLOADED inductance of the primary so high that it does not cause excessive currents in the drivers. That sets the minimum number of turns.
Yeah, for PP, you have to deal with the transformer. Small deadtimes (including negative) can be okay for half bridge, as long as you're not driving a low-DCR load (like a transformer without a coupling cap).
The classic solution being the ATX power supply, where a half bridge drives the transformer primary, returned via 2.2uF film cap to the FWD supply's middle tap. (The cap could return to any end of the supply, but the middle tap is convenient to reduce the startup transient. Alternately, a "half bridge" of caps can be used -- a capacitor divider -- which is the preferred method for FWB supplies.)
Note that, within a cycle (i.e., ignoring "flux walking" bias over many cycles), each switching transient involves the inductance between switches. In the PP case, that's the end-to-end leakage. In the half bridge, it's stray wiring inductance, from nearest bypass cap, through the two switches.
Zero dead time, or slightly interleaved, switching is possible when that loop inductance is intentionally controlled, setting dI/dt. This is preferable for synchronous switching, and for bidirectional converters (power converters, class D amps) where consistent EMI and higher efficiency is needed. (Not much higher efficiency, mind -- the high frequency reactive current drawn by the overlap has to be dealt with appropriately after all. The main thing to be gained is body diode recovery, which is a monster with higher voltage MOSFETs.)
Also, a current-sourced inverter MUST operate interleaved. In that case, "dead time" is dead in the voltage sense, meaning, both devices ON during the dead time. This isn't used much in power applications, but is relevant to some configurations ("Royer oscillator") and RF amps (e.g., class E, PP).
Tim
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