How to find ASIC design houses?

It can be fun but I'd never want to do that myself so I always work with an IC designer or team. IC design is almost 100% CAD and thus a very sedentary kind of job for the body. My preferred work style is to sometimes go out with the mountain bike, sit on a rock and design stuff. With zero bars on the cell phone :-)

That would be a show stopper for this project.

Might want to also look outside the US for that. One project we just kept running on 6" wafers for a long time. That saves on cost.

That is sometimes the motivation but usually it is to trim cost for mass-production.

This is the most extreme "electronics cramming" I ever was involved in:

There are five ICs in that little tube next to the penny, along with 64 PZT tranducers elements that are connected to those.

--
Regards, Joerg 

http://www.analogconsultants.com/

My experience with Skype is not very positive except for contact with relatives overseas. Screen share never worked right for us. My preference is Zoom.

However, there comes a point where meetings are better. Either when working in the lab or when a huge amount of schematics must be looked at simultaneously. The latter happened on every single design I was involved in, where a large conference room table was barely sufficient. And not to forget the bagels :-)

On item I am still on the lookout for is a small stylus tablet that I can use for the whiteboard function. Something simple that plugs into USB, not a tablet computer.

--
Regards, Joerg 

http://www.analogconsultants.com/

Well, the LAYOUT is all CAD, but in mixed signal work, there is a LOT of thinking about topology and getting the right transistor size and current to get desired noise performance. Or, at least with our designs, that is where you either succeed or not. With the old AMI process, the noise calculated using their design kit was about 3 X lower than the actual parts, so we had to come up with fudge factors to get realistic simulations. We are hoping the AMS process is not lying.

WOW, that is extreme, all right! Our design guy also worked on signal processors for cochlear implants.

Jon

True but you still need all the process info at your fingertips and you typically end up doing att this are a desk. Not very healthy. This is one of my favorite design locations:

The only way to get there is on horseback or with my favorite vehicle:

Just don't expect cell phone coverage. Got to carry a ham radio transceiver in case of emergency.

Or, at least with our designs, that is where

We were mostly happy with AMI. Though that was back in the days when it was still AMI. I am mostly out of that now, partially retired or at least trying to retire.

Such implantables are tough as well, everything must be super small and be very low in power consumption. A friend had one and he could finally hear us again. Cochlear can make a huge difference in people's lives.

--
Regards, Joerg 

http://www.analogconsultants.com/

Skype is now hopelessly broken.

Luckily, it's also unnecessary. With browser support for WebRTC, services like

offer a better service with direct point-to-point connections, and almost none of the corporate snooping and data collection that motivated Microsoft to buy Skype.

Clifford Heath.

Gee, Joerg, you ride a girl's bike?

;)

Phil Hobbs

Mountain bikes have a lower top tube so you don't sing soprano after an unplanned sudden deceleration followed by an involuntary dismount :-)

Also, normally the bike looks more macho because of cake-in mud, horse poop and stuff.

--
Regards, Joerg 

http://www.analogconsultants.com/

Single chip mixed signal is crazy. We usually want dense digital for speed and big analog for power. On our last job, we built the analog stuffs aro und an empty rectangle with matching pads for an Altera fpga. The fpga sta cks upside down on the analog base chip. Even getting the bare die was dif ficult without going through a third party shop with more contacts with Alt era. Now with Intel, might be better or worse.

How much digital processing (in terms of Logic Gates equivalent)? Perhaps Cool Runner for low power.

Having lunch in Sacramento today, before heading to SF. I transfer here often.

fredag den 12. april 2019 kl. 17.27.14 UTC+2 skrev snipped-for-privacy@gmail.com:

ed and big analog for power. On our last job, we built the analog stuffs a round an empty rectangle with matching pads for an Altera fpga. The fpga s tacks upside down on the analog base chip. Even getting the bare die was d ifficult without going through a third party shop with more contacts with A ltera. Now with Intel, might be better or worse.

some 15 years ago I was involved in a chip with an SoC stacked with a radio transceiver, with all the test code running in RAM everything worked great , with the "real" code running from ROM sensitivity was bad. The ROM was abov e (or below can't remember) the RF VCO

(or below can't remember) the RF VCO

We were using anti-fuse SoC at one time, because of lower power. Was just reading about lattice ICE, they claim that their sram fpga is lower power than Flash or Anti-fuse. No sure if it's true.

I don't know yet but very little. We won't use FPGA or CPLD, those are usually too cumbersome.

Then we could have almost met. I did a bike ride to Sac yesterday and we were at the "Bike Dog" brewpub at 9th & Broadway around lunchtime. Had to detour because the bike path was closed for a recovery operation. A tow truck has gone off the freeway bridge into the river with a couple in there. Gruesome scene.

--
Regards, Joerg 

http://www.analogconsultants.com/

You mentioned serial port; so, fair amount of digital processing. Where ar e the input and output? Buffering RAM? Perhaps a rough high level descript ion of the processing involved.

Digital and Analog process requirements are different. We usually use tier

-1 (fpga, cpld and existing chips) where someone else is paying for the fab . tier-2 (or 3) for digital and tier-4 (or 5 or 6) for analog.

Analog fab houses retain the older equipments to make cheaper chips. Digit al fab houses usually chase after the fastest process.

If size is not critical, then Chip on Board (COB) might work. However, PCB s of the order of 0.1mm pitch are not cheap either. The best choice may be a digital chip on analog mother chip (COC).

Currently in talk with a customer who wants Ultra-Scale Plus (US+) FPGA wit h 4-way SRAMs. The 5 die must be mounted right next to each other for spee d. So, a mother chip with 5 empty rectangles and surrounded by power manag ement stuffs: DC/DC converters/buffers for 0.8V, 3.3V, etc.

Yes, i was just few blocks away at Amtrak station on 4th.

I can't reveal much in public and it also isn't fully defined yet. Essentially analog signal processing and multiplexers below 1MHz, then some a simple digital interface to address this stuff from a uC. SPI or similar. That is pretty easy, we have done it on an old-fashioned AMI process in the 90s and there the analog was in the low tens of MHz.

Multi-chip module technology is too expensive in this situation. Bare chip on board would not require ultrafine PCB structures in this case but in later iterations it might. Access to high-end PCB manufacturing is very good at this client because they are international.

We cycled right by there along the river. After another detour because parts of Discovery Park were still flooded.

--
Regards, Joerg 

http://www.analogconsultants.com/

OK, that's good enough. Any local storage requirements? RAM or FLASH?

If they have the money, high-end fab is never a problem. Actually, low-end is more of a problem. We usually need to look/ask around who still has working old equipments and willing to make chips for less. Last time, we were using 90nm on 6 inches wafer.

No problem, we will meet again sometime.

If you are talking about cochlear implants, then it is almost all digital, I think. You have eyeglasses or a gadget behind the ear with a microphone, digital signal processor and battery. The implant has an array of electrodes, is powered by short-range coupling (magnetic, I think) and a small digital bit to decode commands for each electrode. I think the electrodes are PWM, and don't have an analog amplitude.

If you are asking about Joerg's project, ignore this,)

Jon

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Yes, Joerg's project. It was Joerg's statement you are quoting. I am just trying to understand how to do it. Even all digital circuit will need som e analog voltage buffers/drivers/translators. For example, the latest proc esses are likely 0.8V core, 2.0V I/O, 3.3V and 5.0V as well.

Let all meet in San Francisco to discuss this. My office can handle a few people; if not, i can find a bigger place. How many people want to come, i ncluding Joerg, of course.

Ed Lee

4596 Mission Street, Suite 7 San Francisco, CA 94112

I want to come, but I am 6000 miles away ?

Skype?

Yes, possible.