Watch out for the LM2941's output-capacitor limited esr stable region (datasheet fig 13). We even make a deal about it in AoE III, see Fig 9.27, page 617. It's pretty limited at low currents, only a 10x range. What happens when you innocently add a ceramic bypass cap or two after the regulator? Can we count on electrolytic esr loss to damp any oscillation?
Figure 5 of the datasheet is enough to generate considerable heartburn
...Jim Thompson
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| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
I breadboarded it. It seems happy with a 220 uF aluminum output cap and a bunch of paralleled ceramics. That combination, an alum or a tantalum plus the various ceramic bypasses, is usually stable, and has good transient holdup.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
One can hope the 30V cutoff is a predictable value. I imagine it's a kind of foldback limit set by resistors ratios and with the aid of some series 7V zener Veb breakdown. If so it may reliably stay far away from say 25V in. If not ...
If you have a lot of bypass caps (something vaguely comparable to the electro's value) and not a lot of series resistance, you could get into trouble, I suppose. A bigger electro will fix that, because the closed-loop BW drops like 1/sqrt(C), and its ESR is less as well, so it gets a lot harder for the ceramics to cause enough phase shift across ESR to destabilize the loop.
The sheet resistance of 1-oz Cu is about 0.5 ohms per square at 25C, so if the minimum ESR is 30 milliohms it doesn't take too much trace length to get you out of the danger zone.
It isn't just LDOs that have this problem--even my fave LM2594 switcher will oscillate with 20 uF ceramic on its output. 10 uF ceramic and 68 uF aluminum works fine, even with very little trace length.
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
hobbs at electrooptical dot net
http://electrooptical.net
There's no transformer. The funny looking TP things are PCB-foil current shunts, for measuring load currents. I usually use 0.1 ohm resistors, but I didn't want the voltage drop here.
Note the Italian opamp.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Oh, different schematic. That's a custom pot core design.
formatting link
(I wound that prototype myself)
Nothing remarkable. I recently redesigned it; the original was bifalar with litz wire, which was overkill. The new version is just #28 solid Beldsol, wound any which way.
Allow me to plug Newava, the outfit making the next batch of 300 transformers for us. They do magnetics and cable assemblies and are great to work with.
formatting link
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John Larkin Highland Technology, Inc
lunatic fringe electronics
It's a shutdown feature to protect the internals from load dump. The origin al NS datasheet has two graphs "output voltage at the extremes" for Vout at 5V and 15V with 100R loading both cases, Vout vs input voltage, both cases have very sharp Vout nose dive to 0V at exactly 30V. They also have in the tabulated specification, Maximum Operational Input Voltage, Typ is 31V at room temp, with 26V guaranteed over "Full Operating Temperature Range", for the T, S, J, WG and LD part suffixes, there is no such full temp range gua rantee for the CT and CS suffixes, just a 26V at room temp. So, assuming th e Vin=Vout + 5V does not make a difference, he should be safe with a 24V+ /-5% input.
I can only speculate that Vout>5 is an internal error amp feedback stabilit y requirement. As for the Vout, max at 20V I am now certain that has to do with the original NS datasheet specifications. All the wonderful regulation , output impedance, noise, ripple rejection, and stability, specs that powe r supply designers look for, are only good for Vin= Vout + 5V. So that wi ll naturally limit Vout to 20V to keep Vin with the maximum input voltage o perational region
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| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
That's nice. A TL431 regulator mandates another inverter stage, and two transistors serve well. They can be in a single sot-23-6 package, e.g., types as shown in AoE-III, Table 8.1b, page 502. Maybe a DMMT3906 or a BCM857DS.
What happens to the stability of your circuit with a humongous output capacitor load?
Yeah, it is cute but I figure you don't even need the two transistor mirror - a single pnp would do the job? Jim is a chip designer so is just so habituated to tossing zillions of current mirrors around :)
Below that you run out of phase margin as the Cgs of the FET snags you. ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Smoke and (habituated) mirrors are cheap ;-) A single PNP provides too much loop gain... we already have more gain than we really need. ...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
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