IANAL, but the essence of patents is disclosure of the techniques involved. I doubt simply selling an item is sufficient. OTOH publishing a technique certainly is sufficient, and is much cheaper.
I believe there are publications regarded as normal channels for that. I doubt anyone reads them, so it might be considered "security through obscurity".
how much
to threaten
dIANAL either but,
A faster edge always help, however, the xtal frequency is usually chosen to satisfy other criteria.
Aging is key. Low frequency ones age better because they are bigger. We use
3rd overtone in some products because of that. Make pulling a lot harder though.My asics do actually have selectable dividers of 2,4, 8 for other purposes.
Very impressive rise times.
I am using a 0.18u process, so 50 ps is about the fastest possible.
Faster processes are not really useful, even if we could afford them,. They don't have very good general noise performance.
Yes, noiseless gain is an option... but no such thing as a free lunch... large gain, makes the effective input capacitance of the comparator larger, which buggers the noise...
Its interesting the effects that crop up when you *really* study the problem.
The key close in noise determinator of a comparator/xtal oscillator system is the input capacitance of the comparator being modulated by the 1/f noise of the transistors in the comparator. Its a bit subtle, but easily checked in simulation.
The comparator is fed from the xtal load capacitance, so the comparator input capacitance forms part of the oscillator loop. It is direct frequency modulation. In simulations, you can look at the phase noise at the input (as apart from the output), and Cadence spits out a table of what transistor generates what % of noise. Its the nonlinear voltages and currents that are modulated by the noise of the transistors, which modulate the effective capacitances formed by miller gains and emitter follower loads etc....in the comparator. Note that the xtal load capacitors are only 10pF -20pF.
-- Kevin Aylward
It's sufficient to make something unpatentable in principle. But that hasn't stopped eg Mr Bayliss patenting a clockwork motor driving an electric motor, something loads of us did as kids.
if you don't want exclusivity or saleability of the technology, sure
NT
Indeed, provided the invention is, in some way or other, demonstrably visible. That can be very difficult to prove, especially with "invisible" embedded software.
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It's not cluelessness, but rather a built-in set of assumptions that are em bedded in that library of old designs.
With the oscillators you choose to work with. People who need serious oscil lator stability rely on quantum physics to get what they need.
This rubidium frequency standard isn't all the way there to a system on a c hip, but its pretty compact.
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Tracks on ASICs can be configured as low loss transmission lines. Wasting e nough silicon area to get enough delay (which wouldn't need to be much) may be an economic impossibility. but at least the tracks don't dissipate heat .
That's what I said.
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That's obvious.
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So pay for a big chunk of silicon, or mount it on a chunk of thin film diam ond to heat sink it better.
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But you can't explain why in a way that intelligible to anybody who isn't d eep enough into the technology to be a direct competitor.
It is if you want to communicate the theory.
t kms
Technically, a trade secret. I worked on electron beam testers, and if the secret is embedded in the silicon, and competitor with a suitably embellish ed electron microscope can read it.
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Generally true. Sturgeons Law was that 90% of everything is rubbish. The re maining 10% has been known to make people lots of money.
The trouble with patenting good ideas is that it is rarely clear which good idea will be marketable.
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This happens, but a patent search is part of the patenting process. The exa mples I was confronted with didn't suggest that searchers were particularly expert.
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More negotiating chips in patent swaps. To some extent patenting everything you can can hide crucial patents that are important in a flood of less imp ortant paper-work, but the value of a patent isn't always obvious. One frie nd of mine patented an idea (for a better confocal microscope) that eventua lly made him millions, three weeks after Tektronix applied for a provisiona l patent on the same idea. Tektronix didn't follow up with a real patent (w hich would have cost them thousands of dollars) so my friend did get the pa tent.
-- Bill Sloman, Sydney
...but apparently, your assumption here, is that other people are also too clueless to not understand those assumptions either.
For example, I looked at the effort they did in the designs of 60 years ago get better ps rejection. It was a no brainer that such effort would be wasted today. We don't use vacuum tubes.
There are billions and billions of product unit sales targeting the stability achievable by xtals. That's the market I'm in.
Not at 10MHz to 60MHz (which is where the best xtals are) though. Simply not physically viable at those frequencies
You are really toiling to get a few nH on chip. I would say 1GHz is about the point where inductors/T lines might make sense on an ASIC
I have looked at this for a 2G5 product, e.g. maybe 400um x 400um on a 1mm x
1mm chip is a big chunk.5 layer metal helps for constructing spirals.
But not readily apparent to those that wrote the book I referenced. They made a big deal of proving that So/No=Si/Ni for a band limited input, and based following ideas on that result. The result though is, essentially, useless for designing real osc/limiter systems.
Ahmmmmmm...... and oh dear.....
All of the electronics are in a sealed package (xtal, sensor, asic). The goal of the package design is to have as *large* a thermal resistance as possible. Immense thermal modelling effort in COMSOL is done to achieve this. Its why we have only 4 pins coming out from the package to *minimise* heat loss.
Now... just why do you think that is done......?
No one wants to waste 10 Watts of power in an OCXO... This should be obvious....
As it is, at -40 deg its about 0.5W, at around 200mA.
Everyone would like the power of a TCXO (few ma) , unfortunately TCXOs don't cut it for all applications.
So... there are conflicting issues at low and high ambient temperature.
I am not going to explain the specific details that I use at my place of employment. However, I have posted generic technical details on my website as to phase noise that many others seem to understand quite well.
I meant to say, "some others" not all. Many manage quite well with what I write. Of course, there are some mathematically technicalitys that some may not be acquainted with. I would suggest a book on Signal Analysis or Math e.g. convolution theorem.
-- Kevin Aylward
It's not a question of whether they understand them, but rather whether they bother to question them. "Not invented here" isn't an attitude that people adopt, but rather the human default setting.
For excellent reasons. Most of the time.
Until somebody comes up with a way of achieving the same stability more cheaply.
-- Bill Sloman, Sydney
There's some interaction of patent and trade secret law involved with that one. I'm not a lawyer, but AIUI anything that can be learned by examination of a product offered for sale cannot be a trade secret.
If you have a real trade secret that somebody else patents, as far as I know you're out of luck.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Prior sale is a very strong defense against charges of patent infringement. I spent a good part of today testing old hardware for just that reason.
IBM has a journal like that, the IBM Patent Disclosure Bulletin.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
When there are hundreds of millions of dollars at stake, you'd be surprised at what you can get done.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net http://hobbs-eo.com
Undoubtedly true. Such money can be used in a variety of ways, of course.
I bow to someone with actual experience in the field.
Unsurprising for IBM. I believe there are public equivalents that can be used by anyone.
One is to have a reverse-engineering firm give you transistor-level schematics and read out the flash to get the binary.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC / Hobbs ElectroOptics Optics, Electro-optics, Photonics, Analog Electronics Briarcliff Manor NY 10510 http://electrooptical.net https://hobbs-eo.com
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I have not located a copy yet. However, I have found references that discuss it.
which references this:
It is clear that little understanding of *practical*, current commercial design is shown in the approach. I can say its useless for xtal oscillator limiters, just from reading the above paper. It shows no appreciation of how the amplifies and filters are actually constructed for starters. The fundamental issue is, how is an amplifier designed such that its supply current is minimised whilst minimising the noise. The topology is the bit that actually counts.
I can't stress this enough. It is the solving for optimum noise/current that is crucial. Anyone can get low noise if they have 1 amp available.
A key bit is the filtering noise standard of a xtal oscillator is referenced to a Q of say 100,000. It is impossible to filter to this level in subsequent gain stages. In an ASIC going into a 5mm x 7mm or 3mm x 5mm package, inductor filters are just not an option. So, its simply not possible to put meaningful filtering between gain stages for high performance systems
These mathematical approaches are completely worthless for real, commercial design. For starters, the waveforms are just too nonlinear to model with approximations.
Optimum phase noise osc/amp design today is done, essentially, with no user mathematics whatsoever. Its done by understanding qualitivity what the physical noise mechanisms are, are running PSS/PNOISE simulations with software tools that just spits out the results.
Its not that good either.
It quotes around -161 dBc flat band noise at a supply current of 15 mA.
For the topology I developed for my ASICS, under the same operating conditions as above, I would get typically -168 dBc at 2.2 mA. If I were to adjust the design for 15 mA, it would be something like -176 dBc, at 5 times lower noise.
I might post how its done, because quite frankly, after the fact, it is truly, truly trivial, zero chance of being patented, the topology is already used in billions and billions of products for other purposes, but apparently not in the LTC6957 et al.
What I will say though is that, as per the above paper actually analysing the effects of clamping diodes, that clamping diodes are a disaster. They may well be used to say, prevent a bipolar gain stage saturating but they throw away supply current, which is the key bit we are trying to minimise.
That should be enough to figure what topology is truly the best.
-- Kevin Aylward
On Jan 14, 2019, Kevin Aylward wrote (in article):
Collins.
Joe Gwinn
On Jan 14, 2019, Kevin Aylward wrote (in article):
Fortunately, someone has now sent me a copy.
I had fair read of it. The theory just does not apply to precision oscillator limiters. Some of the assumptions that are not met, are actually stated in the paper.
A key point is that this analysis is geared to squaring up say, a 100 Hz signal, which needs very large gain to get the slop up to 10 ns precision (jitter), let alone the < 100 fs I am dealing with. That is, say a 500 mV to
1V sine at 25 MHz, squaring it up to 25 MHz square, at 100fs jitter. The amplifiers are highly non-linear, so pretty much kills the whole analyses in the paper. 1/f up-conversion is a major issue, again the paper is unable to deal with that, let alone the noise of the limiter modulating the capacitance seen at the oscillator tank causing additional phase noise. That is, the limiter is part of the oscillator loop. You have to design with the oscillator connected to the limiter in a oner to get accurate results.The only practically way to design competitive low phase noise limiters today, is to use commercial, very expensive, phase noise analysis software. I reference on my site papers that show how stunningly difficult it is to calculate phase noise:
Hand calculations simply don't work. The equations for Phase Noise are just too intractable.
-- Kevin Aylward
On Jan 15, 2019, Kevin Aylward wrote (in article):
Yes. Collins was addressing the design of the zero crossing detector function of a DMTD (Dual Mixer Time Difference) test set. The beatnote to be squared
.does not require any specific end-to-end gain.
Like what? If money were no object, which is best?
Joe Gwinn
The assumptions/axioms of the paper are simply not true for the design of limiters squaring up oscillators. Such limiters are highly nonlinear in gain and *phase*.
As I noted, and you noted, the paper to get to grips as to why, for example, assuming linear amplifiers, with linear capacitors will get you errors of like 50 dB.
I have it more tractable explained on my site. Demir didn't actually explain, physically, in his example in the paper, why it gave 50 dB errors from the H-L approach. The reason, is that he had varactors directly across the transistors. This mean 1/f noise modulated the varactors directly. In a er.. competent design, one never connects the varactors like this. One uses a blocking cap, say 10s pF which stops the 1/f noise getting to the cap. The H-L method simply falls all over (as does the Collins paper) when there are nonlinear time constants, as indeed there are in ALL real circuits.
There are pretty much only 3 options
1 Agilent ADS 2 Cadence RF 3 Mentor Graphics RFYou are talking $100k per seat per year.
Mentor Graphics bought Berkeley Design Systems, who implemented the technique in the A-Demir paper above. It's the best.
A key bit in Cadence RF, for example, is that it prints out an ordered list of the noise contributors. This allows a systematic trial and error homing in on the optimum combination of device sizes, current, noise over frequency etc.
There are various trade-offs. e.g 1/f noise goes with sqrt(W.L) (MOS), however, so the capacitance goes with WL, which is nonlinear, which reflects to the oscillator...
Typically, one runs 1000s of sims to get the best compromise specs
There are no free PSS/PNOISE as far as I know, although when I last checked for ngspice, they were making attempts to incorporate PSS (periodic steady state).
I usually use the Shooting Method option, not Harmonic Balance. It's, arguably better for non-linear circuits.
Kevin Aylward snipped-for-privacy@kevinaylward.co.uk
Am 18.01.19 um 15:42 schrieb Kevin Aylward:
And Ansoft Microwave Harmonica, maybe Genesys.
There is QUCS / QUCS Studio that can do harmonic balance at least.
<Third party tutorials: <
Qucs Studio is the version maintained by the original author. There is also qucs without -studio which seems more outdated, maintained by the rest of the developer group after a divorce.
It is open source and belongs loosely to the kicad universe. Installation is simple: there is none. Unzip to a directory of your choice and execute the main program.
regards, Gerhard
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