Handling of unconnected pins on circuitboard/ unused pins on microcontrollers (generally)

Floating inputs can increase supply current by biasing the input stage. They should be pulled up or down lightly, or set as outputs to prevent excessive current draw.

Tim

-- Deep Friar: a very philosophical monk. Website:

The floating i/o pins could drain additional current due to cross conduction and random toggling. Although this wouldn't damage the MCU, it could very noticeably increase the power consumption of the low power devices. Good practice is either pull unused inputs to '1' or '0' or configure them as outputs.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Some uPs and many FPGAs have default weak (and sometimes not so weak) pullups or pulldowns.

If pins don't have default pullers, it's easy to leave them disconnected and program them to be outputs after powerup, just to avoid floating inputs. Floating inputs can increase power consumption a little but usually do no harm.

I like to run a few unused pins to test points, so I can use them for timing things. I program them as outputs if they are unused. It's fun to watch, say, IRQ execution time on a scope, and see the various paths through the code.

So, it depends on which chips you buy, and whether power consumption is critical.

John

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

I've been known to do that, but since I am usually at a loss for waveform storage or logic analysis, I connect the pin to my audio amplifier instead. Inner loops whine, outer loops buzz, routines pop and hum... :-)

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

It's NEVER "safe" to let an input float.

In a uP with programmable ports, it depends on how long it takes for your initialization to either turn the I/Os to outputs, so that should be accounted for.

One trick if you're not sure yet how some pins will be used, you can do a thing like this:

pin pad pad gnd O===O===O===X

so, if you need "expansion", you can cut the foil and klooge in jumpers or whatever, or leave the one trace out, and put in zero ohm jumpers.

But NEVER leave ANYTHING floating if it can be an input. If it could be an output but you won't know until your init is finished, use a pull-up - 4.7K ~ 10K for TTL, 100K ~ 470K for CMOS.

Good Luck! Rich

Just a digital, or even ancient analog, scope will do for timing ISRs or other subroutines. For an ISR, there are usually a small number of different paths through the code, each with a distinct execution time. Like, you might see the longest at 1 Hz if you're doing timekeeping or some such.

We had one recent case where an occasional ISR path was so long that it missed the next periodic interrupt, but no harm was done so we let it go.

The audio thing can be fun.

I've never used a logic analyzer. All they seem to do is take a lot of setup time to tell you "go read your code, dummy!" So I just read it first.

Larkin's Law #1243: the more analysis tools that are available, the more bugs your original code will have.

Larkin's Law #1244: the more analysis tools that are available, the more bugs your shipped code will have.

John

That's not true. Some devices have weak pullups. Some inputs don't draw much current no matter where they float.

John

On a sunny day (Thu, 23 Sep 2010 15:01:21 -0700) it happened John Larkin wrote in :

printf() is my debugger, or serial port if embedded. I always include serial out and ASCII printing of numbers. One I/O pin is all I ever need for debug. But also a scope, else it is guess work, that audio method thing does not work for me. I never use a debugger. Never.

"John Larkin" schreef in bericht news: snipped-for-privacy@4ax.com...

You missed the point. Playing with logic you've to make sure all your inputs are always well defined. Which is high or low in the binary world. Weak pullups defines the input to be high. They're just meant to do so. Loss of current (energy) is a side issue.

petrus bitbyter

Yes, internal "weak" pullups are intended for this purpose.

Yes, so it's not a "maybe". It doesn't matter if it's a 'H' or 'L', just not 'M'.

No it is not. Some logic families will draw *significant* current in the threshold. Think of shoot-through current being a DC condition.

Did lot. I objected to the word NEVER. Sometimes it is quite safe. Schmitt inputs don't generally use much current if they float.

Playing with logic you've to make sure all your inputs

Unused inputs? Why?

John

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

I regularly do that. I make a rudimentary, hard-wired multitasking environment (cooperative to be precise). Routines run until they're done; they aren't started again until the "working" flag is cleared, so the stack stays happy. A proper multitasking system uses atomic operations and blocks (trivial to implement with cli() and sei()) to keep things flowing smoothly, so it all runs as intended.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

for me.

I love debuggers--good ones, anyway. The last good one I used was the one that came with VisualAge C++ for OS/2. It's really hard to sort out concurrency problems without one, and they catch the occasional memory corruption bug too. Linux has some pretty good tools for that, e.g. valgrind and especially mudflap.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net

The only trouble with this (as I discovered the hard way) is that a programming bug might cause you to drive that ground connection with a high-level output. This results at best in a very hot chip. Resistors are a lot safer.

With some devices that have multiple package options there is no alternative but to use the on-chip pullups as there is no connection to some i/o pads in the smaller pin-count variants.

John

Good point. There are lots of uPs and FPGAs that have unbonded pins in the smaller packages.

John

I've done this - I was designing a variable-duty-cycle astable pretty much by the seat of my pants, and, lacking 'scope, used a spare 2" speaker, and I could hear the PWM by the harmonic content.

The circuit was the bog-standard astable, but with a pot with its wiper to

+V for the base resistors. I don't know if that's "new" or anything, and I've wracked my headbone trying to figure out how to do the same thing by voltage control (i.e., without having to crank a physical pot), but lost my motivation when the project died on the vine. )-;

Cheers! Rich

This frightens me. I would never "let it go" in any production code - I'd have accounted for it, one way or another, to see to it that my code does exactly what it needs to do[1]. "Oh close enough ... ship it!" is the kind of attitude that got us Windows Vista.

And I'm kinda surprised that John Larkin, of all people, would allow anything so sloppy to get through his meticulous, borderline obsessive, quality assurance process. ;-)

Thanks, Rich [1] Yes, evidently, your code did what it needed to do, but I just don't like loose ends in _any_ code.

Yeah - did you know you can make a flip-flop with _one_ CMOS inverter? Just leave the input floating, and every time you touch it, it switches. ;-P

Cheers! Rich

Maybe some people still design with "discrete" logic, where you get packages with, say, four gates. If you only need three, the fourth one needs to be accounted for, one way or the other. Not all of us have the luxury of an FPGA/CPLD development system.

Thanks, Rich