got a question about a layout technique.

This is not a RF board, so it's not some exotic tuning technique.

The small dots look like what's called "thieving" or copper balancing. It's used to balance out current density over the are of the PCB when it gets plated. Through hole PCBs are usually built like this:

- image is formed on copper outer layer, excess copper is etched away.

- the through holes get drilled

- the board now gets plated, the copper solution creates the via barrel, also it builds up the copper weight on the PCB.

If the board has large areas of no copper, it can cause local gradients of ion density that can cause plating problems.

It really depends on the exact manufacturer and what process they use, and what experience they have with a given board.

You can add these dots yourself, or they can get added by the PCB fabricator. They should not cause any electrical issues in a low voltage low frequency board like this.

Now for the hatching, I don't know. PCB software can usually generate shapes either as hatching or solid shapes.

Sometimes you can get a PCB to warp if there is a lot of solid copper unevenly distributed, but I haven't seen that in a long time.

Likely a ground. Those looks like capacitive buttons, so a ground surrounding them would make sense. Perhaps the intention of the grid is to reduce board warp.

I added another example here:

some idea came acrossed my mind:

1.in old days people used hatched ground. 2.might a continuous ground affect the impedance calculated previously if we think it is a ground.

still no clue so far.

I added another example here:

some idea came acrossed my mind:

1.in old days people used hatched ground. 2.might a continuous ground affect the impedance calculated previously if we think it is a ground.

still no clue so far.

the top layer ground surround cap buttons is full poured but the bottom are made of dot area. strange?

from the given gerber files, these areas are left blank.

You are making this way too complicated! As the original responder stated, these are copper thieving patterns which even out the etching of the board when removing copper. Without these patterns, some parts of the board will be over etched which causes problems with fine lines being made too narrow. Often, these patterns are added by the PCB house which is probably why the original Gerbers don't show these. On critical boards, I'll put in these patterns myself using a Gerber editor or give the board house instructions on clearances and areas that must not be altered. It's that simple.

--
Mark

0

voila.. this solved puzzle.

Capsense capacitive touch used with the Cypress PSoC IC