Hello,
I was reading about frequency synthesizers and it seems I am missing some concept.
These synthesizers can generate higher frequency. On the specification sheets, I read that we can divide the reference frequency by certain factors. My question is: If we are dividing the frequency, why are we getting much higher frequencies at the output?
A:
You can find out amazing amounts of stuff doing web searches, like on "frequency synthesizer theory".
B:
You can only get frequencies out that are multiples of the reference frequency going to the phase detector (unless you're using a fractional N synthesizer -- You can find out amazing amounts of stuff doing web searches). It's easier to make a good clock source from a crystal, so if you want to have a synthesizer work in 5kHz steps you'll want to generate a clock at (say) 5MHz, divide it by 1000, then synthesize a frequency from that in 5kHz steps.
-- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html
This might be helpful:
Have Fun! Rich
Because we divide down and then multiply up. A common reason for doing so is to reduce the step size / comparison frequency.
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