I have a time-critical thing where the signal passes through an XC7A15 FPGA and does a fair lot of stuff inside. I measured delay vs some voltages:
1.8 aux no measurable DC effect 3.3 vccio no measurable DC effect2.5 vccio ditto (key io's are LVDS in this bank)
+1 core -10 ps per millivolt!If I vary the trigger frequency, I can see the delay heterodyning against the 1.8V switcher frequency, a few ps p-p maybe. Gotta track that down.
A spritz of freeze spray on the chip had practically no effect on delay through the chip, on a scope at 100 ps/div.
I expected sensitivity to core voltage, so we'll make sure we have a serious, analog-quality voltage regulator next rev.
The temperature thing surprised me. I was used to CMOS having a serious positive delay TC. Maybe modern FPGAs have some sort of temperature compensation designed in?
We also have a ZYNQ on this board that crashes the ARM core erratically, especially when the chip is hot. It might crash in maybe a half hour MTBF if the chip reports 55C internally; the FPGA part keeps going. At powerup boot from an SD card, it will always configure the PL FPGA side, but will then fail to run our application if the chip is hot. We're playing with DRAM and CPU clock rates to see if that has much effect.