ESR meter project, again.

A while back a proposal was put forth in the group to come with a good, low cost ESR meter, but it never went anywhere.

I was thinking about it the other day, and a method occurred to me that needs a couple of sine wave sources, in exact (or as near as possible) quadrature, up to perhaps, 1 MHz.

Please offfer suggestions as to how they might be generated.

The first thing that occurred to me, was to use a DDS IC, such as the AD9854. That would give guaranteed quadrature, but look at the pins on that chip!

It would be nice to come up with a cheaper method.

Suitable methods shouldn't require manual adjustment to achieve quadrature, such as a trimpot. The quadrature relation should be inherent, as with the DDS, or self-adjusting with some sort of feedback arrangement.

Reply to
The Phantom
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ow cost

eeds a

, up to

854.

e, such

DDS, or

DDS would obviously be the best. Using analog techniques, you just need to shift the phase. Several techniques could be used. One is to dig up the old front end filters used in SSB. They are designed such that the phase difference between two filters would be in quadrature, though there would be an arbitrary phase shift from the reference oscillator. You can also build the two op amp BP/LP filter, which would have outputs in quadrature. Lastly, any sort of lag system can be tweaked for quadrature at one frequency.

Also, a PLL will lock in quadrature. You would get a bit of jitter in the locked signal.

That said, I have a few ESR meters that cost on the used market from $40 to $200. You need to keep looking on Ebay when one shows up from a real person versus these dealers that post outrageous buy it now prices.

Reply to
miso

Very good post! Thanks - that's what this group is for.

Digikey shows the AD9854 at CAN$38.22, qty 1. That's not bad considering how much circuitry it would eliminate. Sure, it has 80 pins to wire, but a conventional circuit would probably have lots of components that have to be bought, stocked, checked, connected, debugged, etc. And the resulting performance in unlikely to match the AD9854's 0.5dB and +/- 1 degree error.

As a bonus, the AD9854 is crystal-controlled, can generate a higher output frequency than requested, gives 1uHz frequency steps, claims 3ps rms jitter, and so on. When it is not being used for checking ESR, it would make an excellent wideband signal generator. So I wouldn't let the number of pins affect the choice.

Incidentally, I bought a LCR meter recently. And promptly blew it out checking a 10uF cap that was charged to 160V. Yes, there was plenty of warning in the manual to not do that, and a warning was printed on the case.

But I guess I was thinking more of how the circuit would operate, when I heard a dull thud coming from inside the instrument.

I thought it shouldn't make that kind of sound. Then the display went dead. On all ranges. On all functions.

I decided the next ESR meter I get will be homebrew and completely invulnerable to charged capacitors, so your post is a very welcome one!

Could you expand a bit more on your ESR idea?

Regards,

Mike Monett

Reply to
Mike Monett

cost

to

such

One Q&D dumb way is to have a er-circulating counter's parallel outputs address a ROM that has sine & cosine tables in it; parallel outputs to DACs then filter out the quantizied noise...

Reply to
Robert Baer

ow cost

eeds a

, up to

854.

e, such

DDS, or

You can make a 'fair' quadrature oscillator with two all pass filters, sending the output of one back to the input of the other. Make one of the all pass filters with a series R and C to ground on the non- inverting input and make the second with a series C and R to ground. (The other option is to make both all pass sections look the same and add a third inverting stage somewhere in the loop. This is what you'll find on the web if you search for all pass quadrature oscillator. And thanks again to Phil Allison for showing me this circuit.) You then have to make the gain of one of the sections a bit more than one and then have some diode limiting to kill the gain at large amplitudes. It's fairly easy to get the third harmonic down 40 dB. I only had this working up to 25 kHz, but with a faster op-amp I don't see a problem with 1 MHz. (R =3D 1 k ohm and C =3D 100pF are not unreasonable values) The phase error between the two outputs was several degrees when I used a dual ganged pot as a variable R element but was reduced dramatically with fixed 1% R's. Oh I also used good

2% polypropylene caps. I don't think those exist at 100 pF.

George Herold

Reply to
ggherold

low cost

needs a

up to

AD9854.

quadrature, such

DDS, or

Cheapest DDS solution is to run 2 off AD9833's in parallel. They're 10 pins each, so project time wasted negotiating with packaging mechanicals, drops from about 80% to 50% :( Still need a programmed micro to run the DDS chips though. If upper frequency can be eased then maybe do the DDS direct in the micro. An AVR for example, using a few lines of code, can generate a clean sine to 250kHz using an R-2R ladder as DAC and also concurrently output 0-90-180-270 degree squarewaves. The squares seem far more handy than a second quadrature sine, as these kind of applications (via some as yet unwritten law of electronics) invariably end up driving 74HC4053's as phase sensitive rectifiers. The paired antiphasing can be used to eliminate phase drift problems in the main signal path.

If cheap-simple^2 is needed, then 2 off HEF4018 and a dozen weighting resistors will run 2 quadrature sines to >0.5MHz.

Reply to
john jardine

This is effectively a stripped down DDS IC. :-)

John has mentioned that he does does his own DDS inside of an FPGA; getting to

1MHz is easy... although of course by the time you add the DACs and the cost of the FPGA itself, it migiht be more expensive than just buying an off-the-shelf DDS IC.

Analog Devices has some nice microcontrollers with good ADCs and built-in DDSes that would be ideal for this... if it weren't for the fact that they only have a single DDS output. :-( (ADuC7128/7129 ... note that if you only want to measure impedances to 100kHz, they have their DDS-based AD5933 chip that does it all in one package... they generate a sine wave, send it through the unknown impedance, read back and digitize what's left, and run it through a discrete Fourier transform to figure out what the impedance "is.")

The AD9854 is a good suggestion is cost isn't an issue (and it certainly has plenty of engineering overkill already)... one might look at the AD9958 as well... smaller package (56 pins) and generally better specs.

I suspect a Cypress PSOC part isn't nearly fast enough, although it'd be a fun option as well.

---Joel

Reply to
Joel Koltner

What I'm thinking is to do this:

Sinusoidal current |\\ --------------| >------ source | |/ --- --- | | .-. | | | |ESR '-' | | === GND

Assume we have a source of two sinusoidal signals. One is sin(wt) and the other is -cos(wt). Apply a current source sinusoid, sin(wt), to the capacitor (which includes its ESR). Buffer the voltage that appears across the capacitor; it will be mostly a 90 degree delayed sine, which is -cos(wt), but with a phase shift slightly less than 90 degrees due to the effect of the ESR. It is composed of a large -cos(wt) component due to the reactance of the capacitor and a smaller sin(wt) component due to the ESR.

If we apply the original sin(wt) and the buffered voltage across the capacitor to a 4 quadrant multiplier and average the output, the result will be a signal that is proportional to the ESR. Since sin(wt) and -cos(wt) are orthogonal, they will produce zero average output from the multiplier. But the component in the output due to the ESR will not be orthogonal to the generator sin(wt) output.

While thinking about the details of doing this, it occurred to me that we can do away with the multiplier. If we take the -cos(wt) from the generator and vary its amplitude and subtract that from the output of the buffer, there will be a particular amplitude that will exactly null the phase shifted component in the buffer output which is due to the capacitor reactance. The residual will be the in-phase component due to the ESR.

Since the two components in the buffer output, the in-phase and the 90 degree shifted one are orthogonal, we could tell when we have exactly nulled out the 90 degree component by simply adjusting the amplitude of the subtracted -cos(wt) signal until we get a minimum.

If the sin(wt) and -cos(wt) signals are generated by some means which inherently produces the 90 degree phase relationship, then we can accurately measure ESRs which are small relative to the capacitor reactance. If the quadrature relationship of the two signals is dependant on adjusting some trimpot, the we are faced with the problem of determining when they are exactly 90 degrees out of phase, a difficult problem in its own right; such an adjustment is also subject to drift.

I would like to be able to measure the ESR of very low loss capacitors, which requires an accurate quadrature relationship in the two reference signals.

If we only want to measure the ESR of electrolytics, for example, we may be able to use a less precise method.

It would be nice to have an ESR meter that actually uses sinusoidal excitation to measure the ESR, and to be able to measure at several frequencies, perhaps

100 Hz, 1kHz, 10kHz, 100kHz and 1 MHz.
Reply to
The Phantom

Thanks for the reply. I wonder if sine waves are needed? Len Cox has a ESR & low resistance test meter at the bottom of the page at

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The schematic is tiny and impossible to read. Here is a larger version:

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05&i=2

Here is the tinyurl in case wrap is a problem:

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He feeds a square wave into a cap and measures the voltage across it with a synchronous detector. It is fairly straightforward, and he has excellent protection against charged capacitors.

I believe this is the same concept used in lock-in amplifiers. Jim Williams also makes extensive use of the same concept.

Also, Win showed another approach some time ago in sed. I'll try to track it down.

This approach might be extended to fairly low values of resistance using the same technique. I believe micoohmmeters and picovoltmeters use basically the same idea with additional filtering. Another example is the AD630, which can recover signals buried in 100dB of noise. The ADI app note AN-306 shows how to get down to microohms using the AD630:

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I wonder if a second channel in quadrature could be used to measure the value of the cap. This should be easy to check in LTspice, and I'll try it this weekend if I can get some time.

If this works and is suitable, it would eliminate the need for a quadrature DDS since the required signals could be easily generated digitally.

Regards,

Mike Monett

Reply to
Mike Monett

cost

I didn't really follow the other thread, but why bother when Bob Parker already has a neat solution:

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Kit available in the US for $79, with funky Blue LED display:

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If you want to see how it works:

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Dave.

Reply to
David L. Jones

Yes, they are if you want to do the job properly. See:

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As they say there, "ESR is properly the real resistive component of the complex impedance of the device". The ESR varies with frequency also, so you might want to measure it at several frequencies. The various low-cost ESR meters referenced on the Wikipedia page all use pulse or square wave techniques, so the ESR is not measured at a single frequency, but it is a composite result due to the harmonic content of the excitation waveform.

High end LCR meters, such as those made by HP or Wayne-Kerr, etc,, make the measurement with sine wave excitation.

The one in the Siliconchip article you cite uses an excitation frequency of 100 kHz, so the reactance of the capacitor is so low that it drops essentially no voltage when a 100 kHz excitation current is applied. It is assumed that the voltage seen across the cap is all due to the ESR; but the ESL also drops some voltage, which this technique doesn't distinguish. And, due to the fact that square wave excitation is used, the ESR at harmonic frequencies, which may be different than at the fundamental, is all mixed up in the measurement. The designer should have filtered the square wave and used a half decent approximation to a sine wave.

If you want the ESR at 100 Hz, for example, the reactance of the cap is probably larger than the ESR, and the Silicon chip technique won't work well.

To do it properly, a sine wave excitation is needed. The high-end meters are expensive, and I wanted to see if a sine wave measurement could be made cheaply and simply. The high-end meters can measure an ESR which is as small as

1/1000th of the reactance at a given frequency. Such performance isn't needed to characterize electrolytics such as one might find in a switching power supply, but it would be interesting to see how well we could do at low cost.

So, in summary, I'm aware of the low cost meters that use pulse or square wave techniques, but I want to try to do it using sine wave excitation.

And, the purpose of this thread isn't to find a ready-made ESR meter, but to consider how it might be done differently than the available low-cost meters do it, namely with sine excitation. I invite discussion to that end.

Reply to
The Phantom

cost

See my response to Mike Monett. My aim in this thread isn't to avoid bother; it's to attack bother head on, to do our own design using sine excitation! :-)

Reply to
The Phantom

, low cost

! =A0:-)

OK, I'll bite THAT lure. For accurate 90 degree sine/cosine generation, first make 90 degree square waves (VCO at 4xF into a pair of flip/flops does this), then phase-lock two sinewave oscillators to the squarewave references.

VCOs based on the LM13700 transconductance amplifier (figure 17 of the National Semiconductor data sheet has a sample design) get good low-distortion sinewave output, and wide range.

The simplest way to phaselock might be to use a pair of matched Schmitt triggers to convert sine-to-square and phaselock to the square wves (thus the Schmitt triggers will introduce the SAME phase shift on both sine and cosine channels, so the phase difference stays at 90 degrees). Counter-type phase detectors would be useful.

Now, excite the unknown device with the sinewave (through a suitable limiting resistor) and pick off the voltage waveform through a variable-gain amplifier (VGA, again the LM13700 can do this, or THAT 2181 might be suitable). Detect the amplitude with an op amp, and servo the gain so that the VGA output is at some nominal level (like, 1.00 VAC), and digitize the gain-control voltage. That gain-control voltage is proportional to the logarithm of the impedance, so you have many decades of capacitor/resistor value covered without any gain changes.

Finally, mix (multiply) the VCA output with the two phases, and low-pass filter and capture the DC level. Thus, we detect the phase of the unknown device response voltage. It MIGHT work to do some cheaper kind of phase detection here, like using a zero-crossing detector on the VCA output and XOR-ing against the square wave master phases, but the mixer+filter has better noise performance (and the big capacitor driven by a milliamp or so will have a bit of noise).

Then do the whole thing over again at other frequency (there's a VCO controlling this, just change it, wait a few milliseconds, and redo the measurements).

It might take a bit of computation, but this will give R-L-C values for the capacitor-plus-ESR, and can be tuned for audio (like a coupling capacitor for an amplifier) or ultrasound (like in a switching power supply), and will basically do most of the work of a digital bridge. With enough calibrated frequencies of that master VCO, it can completely characterize any linear network, nonideal components and all.

Reply to
whit3rd

, low cost > >> ESR meter, but it never went anywhere. > =A0My aim in this thread isn't to avoid bother; > it's to attack bother head on, to do our own design using sine excitation! =A0:-)

OK, I'll bite THAT lure. =A0For accurate 90 degree sine/cosine generation, first make 90 degree square waves (VCO =A0at 4xF into a pair of flip/flops does this), then phase-lock two sinewave oscillators to the squarewave references.

VCOs based on the LM13700 transconductance amplifier (figure 17 of the National Semiconductor data sheet has a sample design) get good low-distortion sinewave output, and wide range.

The simplest way to phaselock might be to use a pair of matched Schmitt triggers to convert sine-to-square and phaselock to the square wves (thus the Schmitt triggers will introduce the SAME phase shift on both sine and cosine channels, so the phase difference stays at 90 degrees). =A0 Counter-type phase frequency detectors would be useful (like the MC12040).

Now, excite the unknown device with the sinewave (through a suitable limiting resistor) and pick off the voltage waveform through a voltage controlled variable-gain amplifier (VCA); an LM13700 can do this, or a THAT 2181. =A0Detect the amplitude with an op amp, and servo the gain so that the VCA output is at some =A0nominal level (like, 1.00 VAC), and digitize the gain-control voltage. =A0That gain-control voltage is proportional to the logarithm of the gain, so you have many decades of capacitor/resistor value covered without any gain range changes.

Finally, mix (multiply) the VCA output with the two =A0phases, and low-pass filter and capture the DC level. Thus, we detect the phase of the unknown device response voltage. It MIGHT work to do some cheaper kind of phase detection here, like using a zero-crossing detector on the VCA output and XOR-ing against the square wave master phases, but the mixer+filter has better =A0noise performance (and the big capacitor driven by a milliamp or so will have a bit of noise).

Then do the whole thing over again at other frequency (there's a VCO controlling this, just change it, wait a few milliseconds, and redo the measurements).

It might take a bit of computation, but this will give R-L-C values for the capacitor-plus-ESR, and can be tuned for audio (like a coupling capacitor for an amplifier) or ultrasound (like in a switching power supply), and will basically do most of the work of a digital bridge. =A0With enough calibrated frequencies of that master VCO, it can completely characterize any linear two-terminal network, nonideal components and all.

For extra credit: use a resistor divider bridge leg to generate a similar response voltage to the unknown, and measure the VCA phase from this no-phase-shift standard, and generate a phase correction table for the VCA as a function of gain. More extra credit: correct the phase-correction-table for temperature variations.

Reply to
whit3rd

On a sunny day (Wed, 10 Dec 2008 14:48:08 -0800 (PST)) it happened whit3rd wrote in :

Or you could use a small FPGA, put sine and cosine tables in block ram, and use

2 DACs. It could also drive a LCD display at the same time, and do the rest of the logic. I do not know the frequency of the sine/cosine output that is needed for this application, but if below say 5 MHz you could use a R2R network as DAC. Low cost? I dunno, but for sure few parts.
Reply to
Jan Panteltje

d

ood=3D

ion=3D

nd use 2 DACs.

the logic.

this application,

You can get micros with DACs and ADCs in them. This may be better than an FPGA because you wouldn't need the external resistor ladder.

Sine wave oscillators aren't that hard to make if you don't mind a bit of distortion. You could make an oscillator and then measure its exact frequency for correcting the capacitance part of the measurement.

Reply to
MooseFET

nd use 2 DACs.

the logic.

this application,

Alas, that isn't the complete treatment: DAC output will simply have distortion components at/above the Nyquist limit, which can contaminate later measurements unless they're filtered. The filter introduces its own phase shift.

Analog sinewaves from a VCO make a 1:100 frequency range available, and the DAC trickery (or the other solution, with switched capacitor filters) can't get far from the Nyquist post-filter target frequency. It's also a tad irritating that the DAC has a settling time issue. Characterizing a big capacitor requires low frequency (to get C), medium frequency (where R dominates) and high frequency (to get L), and either a large frequency range, or very precise sinewaves, is needed. With analog, you get both, relatively cheap.

Reply to
whit3rd

On a sunny day (Sun, 14 Dec 2008 11:49:52 -0800 (PST)) it happened whit3rd wrote in :

For a 50 MHz clocked spartan II, using the internal x 4 clock multiplier, so 200MHz, you get 200 points of a 1 MHz sine. What is the 'high frequency' in Mhz you are looking for?

If I want to check a cap, I test it in circuit by doing a differential with 2 scope probes on each and. Substract channels, if I see spikes or edges of any amplitude then the cap is defective. I have never used an ESR meter, this method gives me all info I want.

Back to 'Ultra Violet', commercial should be over by now.

Reply to
Jan Panteltje

and use 2 DACs.

of the logic.

r this application,

If you have an ADC sampling at least at the same rate as the DAC is updated, the processed values from the ADC won't be badly effected by the DACs imperfections. It is better to do most of the work digitally than just a little of it, if you don't go with an all analog circuit.

It seems to me that a square wave or other non sine wave of current may be a better way to go. The harmonics will give you multiple frequencies all at once. The multiple measurements can be done all at the same time.

A fairly simple demodulator can pull out the in phase part of the signal. Since the capacitance and the ESL are both at 90 degrees, this measurement will be fairly easy to do.

The ESL would show up as a change in the amplitude of the 90 degree part with frequency. I think that you could get the ESL with two demodulators and simple math on the outputs of them.

Reply to
MooseFET

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