Engineering Types

Ok, so I'm working on an open ventilator project that actually has about th e same chance of making it to market as Trump has getting reelected. So we get a new guy in to help with the FPGA. He is from a background of high s peed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. ADCs sampling at 1 kHz sort of stuff.

So does the guy take a piece of the project and run with it? No, he starts niggling about the choice of FPGA. He's worried that a startup company's product is being used. The tools seem ok so far, but the docs pretty well suck. There is a US guy who can help with various issues or he acts as the go between for tech support when you have a question he can't answer. So far, it's all pretty good.

The guy is even questioning the clock rate. Because there is a technical r eason? No, because he thinks 50 MHz is more available... really? That's t he issue of importance? There are any number of questionable decisions mad e on this project, but ones that have more impact on the outcome.

I've responded to most of his stuff, but I'm getting a bit tired of it. I think I'm going to ask how he work is going and ignore the trivial stuff. At least he isn't like one of the volunteers who I'm having to hold his han d while getting the tools setup and point him to web sites for VHDL-2008. Whatever. I guess I should focus on getting my bits done and not worry abo ut the higher level issues.

It is pretty interesting to see new companies selling FPGAs now. I think t here are at least three and this one has the packaging I prefer and great p ricing. 9,000 LUTs for $5. That's pretty durn good.

Xilinx can't touch that, er, I mean AMD.

I wonder how much that will change the company. I bought some of the stock a couple of weeks ago on the rumor. Now it's just a matter of waiting for the deal to close, then I'll own AMD stock at a 17% increase. :)

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  Rick C. 

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Reply to
Ricketty C
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the same chance of making it to market as Trump has getting reelected. So w e get a new guy in to help with the FPGA. He is from a background of high s peed comms and radar type work. Clearly he can handle this easily. We are u sing a 33 MHz clock rate but most of the processing is MUCH slower. ADCs sa mpling at 1 kHz sort of stuff.

s niggling about the choice of FPGA. He's worried that a startup company's product is being used.

You only have to build one project around a part that didn't end up staying available to get very nervous about buying stuff from start-ups.

It doesn't sound as if you couldn't make the project work with a part from somebody more likely to keep it in production.

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Bill Sloman, Sydney
Reply to
Bill Sloman

If Your expert has experience, use it and don't ridicule reservations gained through hard, if not actually painful experience.

I'm sure, if you ask him/her, he should be able to explain 'why I can't do that'.

RL

Reply to
legg

Why would 1-Hz mechanical system need an FPGA?

And why now?

Clown show.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

It might have been one of the first things the 'expert' would have pointed out, if they were not actually desperate for work, but people tend not to be able to even hear advice, that early in a business relationship.

Wading in and telling your prospective employer that he doesn't know what he's doing isn't usually very constructive. There's always a chance that the boss does know what he's doing - might not be easy to ascertain.

RL

Reply to
legg

Sounds to me like there is no boss.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

When he uses words like niggling and trivial, it's almost a sure bet.

RL

Reply to
legg

Managing a serious, many-person technical project is hard. The boss may be a good manager or a good engineer but rarely both.

Reply to
John Larkin

I've looked at some schematics of commercial ventilators they're not terribly complicated devices. There's a logic board, blower board, sensor board, display board, and power supply board. that's about it.

All the magic happens in software, the one I saw is using a pretty old one probably because it's known to be a reliable and well-specced one, like the Space Shuttle running on a 386.

Reply to
bitrex

Pretty old CPU, rather

Reply to
bitrex

e:

e a good manager or a good engineer but rarely both.

The boss has to be a good enough manager to keep track of all the activitie s, and a good enough engineer to keep track what's going on in each of the activities.

If they can't do both jobs, their competence in one or the other doesn't re ally matter - they'll screw up the project as whole. Trying to separate the job of orginising the work from the job of comprehending what's happen ing is the kind of idiocy you get from people who go through management tra ining, and think that the skill extends to managing demanding technical pro jects.

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Bill Sloman, Sydney
Reply to
Bill Sloman

the same chance of making it to market as Trump has getting reelected. So we get a new guy in to help with the FPGA. He is from a background of high speed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. ADCs s ampling at 1 kHz sort of stuff.

ts niggling about the choice of FPGA. He's worried that a startup company's product is being used. The tools seem ok so far, but the docs pretty well suck. There is a US guy who can help with various issues or he acts as the go between for tech support when you have a question he can't answer. So fa r, it's all pretty good.

reason? No, because he thinks 50 MHz is more available... really? That's t he issue of importance? There are any number of questionable decisions made on this project, but ones that have more impact on the outcome.

I think I'm going to ask how he work is going and ignore the trivial stuff. At least he isn't like one of the volunteers who I'm having to hold his ha nd while getting the tools setup and point him to web sites for VHDL-2008. Whatever. I guess I should focus on getting my bits done and not worry abou t the higher level issues.

there are at least three and this one has the packaging I prefer and great pricing. 9,000 LUTs for $5. That's pretty durn good.

ck a couple of weeks ago on the rumor. Now it's just a matter of waiting fo r the deal to close, then I'll own AMD stock at a 17% increase. :)

Reply to
Michael Terrell

t the same chance of making it to market as Trump has getting reelected. So we get a new guy in to help with the FPGA. He is from a background of high speed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. ADCs sampling at 1 kHz sort of stuff.

rts niggling about the choice of FPGA. He's worried that a startup company' s product is being used.

ng available to get very nervous about buying stuff from start-ups.

Yes indeed. I've been hit by a critical part going EOL after a well establ ished company lost access to a fab from another reputable company. Clearly reputable companies are inferior to startup companies as you say... wait, that's not what you said. So anecdotal evidence, aka "one" experience is n ot worth much.

m somebody more likely to keep it in production.

As is not uncommon with you, an assumption is drawn that is not based on kn owledge of the facts.

Ok, thanks anyway.

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  Rick C. 

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Reply to
Ricketty C

the same chance of making it to market as Trump has getting reelected. So we get a new guy in to help with the FPGA. He is from a background of hig h speed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. A DCs sampling at 1 kHz sort of stuff.

rts niggling about the choice of FPGA. He's worried that a startup company 's product is being used. The tools seem ok so far, but the docs pretty we ll suck. There is a US guy who can help with various issues or he acts as the go between for tech support when you have a question he can't answer. So far, it's all pretty good.

l reason? No, because he thinks 50 MHz is more available... really? That' s the issue of importance? There are any number of questionable decisions made on this project, but ones that have more impact on the outcome.

I think I'm going to ask how he work is going and ignore the trivial stuff . At least he isn't like one of the volunteers who I'm having to hold his hand while getting the tools setup and point him to web sites for VHDL-2008 . Whatever. I guess I should focus on getting my bits done and not worry about the higher level issues.

k there are at least three and this one has the packaging I prefer and grea t pricing. 9,000 LUTs for $5. That's pretty durn good.

ock a couple of weeks ago on the rumor. Now it's just a matter of waiting for the deal to close, then I'll own AMD stock at a 17% increase. :)

If someone tells me a reason for doing something or not doing another thing , I'm happy to listen. That's not what is happening. He is negging anythi ng he can find about the selection. Rather than looking at the requirement s for the FPGA he picked a Xilinx part at random that has only two things i n common with the Gowin part, the fact that it's in a QFP (although much la rger) and that it is an FPGA.

BTW, I didn't call him my "expert".

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  Rick C. 

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Reply to
Ricketty C

out the same chance of making it to market as Trump has getting reelected. So we get a new guy in to help with the FPGA. He is from a background of hi gh speed comms and radar type work. Clearly he can handle this easily. We a re using a 33 MHz clock rate but most of the processing is MUCH slower. ADC s sampling at 1 kHz sort of stuff.

tarts niggling about the choice of FPGA. He's worried that a startup compan y's product is being used.

ying available to get very nervous about buying stuff from start-ups.

lished company lost access to a fab from another reputable company. Clearly reputable companies are inferior to startup companies as you say... wait, that's not what you said. So anecdotal evidence, aka "one" experience is no t worth much.

This can happen, but ti doesn't happen often, and most "reputable" companie s stay in business, and can - and mostly do - negotiate a new supplier. Whe n a start-up goes bust, it's usually gone.

rom somebody more likely to keep it in production.

knowledge of the facts.

The whole point of a programmable part is that you can get it to do what yo u want. Nothing in what you have written (and you haven't written all that much) has suggested that your start-up offered a unique selling point that let it do something that nobody else could offer, and your project doesn't seem to be pushing any technical limits.

I obviously don't know much about the facts - since you haven't given us al l that many - but you haven't bothered to tell us why the FPGA from the sta rt-up was good enough to justify going for a single-sourced part. You new g uy doesn't seem to think that it was , and you seem to be peeved about the implicit criticism rather than cross about his lack of comprehension.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

I was like that once. I thought I knew everything, could do everything, and could advise everyone within range on what they were doing wrong. In short, I was this FPGA guy and a genuine pain in the posterior. The difference was that I had a mentor and advisor in the company, who took the time to explain how things worked. He reminded me that the objective of a design exercise is to make a profit for the company. If my proposed changes and free advice impacted the delivery schedule or the cost to sales, my changes and advice were worthless in terms of the company making money. If the schedule was delayed, the entire market might go to a more nimble competitor, leaving nothing for my employer. If the costs increased with every suggestion, resulting in feature bloat, the prospective customers could declare it overpriced and buy something cheaper.

One manager, who ran my little project was not a EE. As I vaguely recall, she may have been an accountant or previously worked in procurement. Lacking EE skills, I immediately declared her to be incompetent. It didn't matter because her job function had little to do with electronics and didn't require a EE degree.

Every time I delivered a problem, suggestion, solution, or change that was not carved in stone after the design freeze, she had exactly two questions: How will the change impact the schedule and how will it impact the cost? I did my best to answer those two questions, sometimes successfully, but more often, I realized that my great ideas were not going to help the company make money. A better but late or overpriced product is worthless.

I haven't been tracking the progress of your ventilator project but I would guess that it's been running for perhaps 5 months. So, why this late in the schedule is your FPGA guy talking about making fundamental changes in the design? It's been many years since I managed a project, but such things as choice of CPU/DSP/FPGA/whatever had such a huge impact on the schedule and cost, that they were nailed down very early in the project and only changed if the decision makers were bribed, seduced, or blackmailed by a prospective component manufacturer or vendor. I agree with the others that there doesn't seem to be a functional manager available because anyone with experience would have told your FPGA guy that it's much too late to make fundamental changes in architecture, clock rate, vendor, or development system.

Good luck. If I'm right, you're going to need it.

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Jeff Liebermann     jeffl@cruzio.com 
150 Felker St #D    http://www.LearnByDestroying.com 
Santa Cruz CA 95060 http://802.11junk.com 
Skype: JeffLiebermann     AE6KS    831-336-2558
Reply to
Jeff Liebermann

about the same chance of making it to market as Trump has getting reelected . So we get a new guy in to help with the FPGA. He is from a background of high speed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. A DCs sampling at 1 kHz sort of stuff.

starts niggling about the choice of FPGA. He's worried that a startup comp any's product is being used.

taying available to get very nervous about buying stuff from start-ups.

ablished company lost access to a fab from another reputable company. Clear ly reputable companies are inferior to startup companies as you say... wait , that's not what you said. So anecdotal evidence, aka "one" experience is not worth much.

ies stay in business, and can - and mostly do - negotiate a new supplier. W hen a start-up goes bust, it's usually gone.

from somebody more likely to keep it in production.

n knowledge of the facts.

you want. Nothing in what you have written (and you haven't written all tha t much) has suggested that your start-up offered a unique selling point tha t let it do something that nobody else could offer, and your project doesn' t seem to be pushing any technical limits.

all that many - but you haven't bothered to tell us why the FPGA from the s tart-up was good enough to justify going for a single-sourced part. You new guy doesn't seem to think that it was , and you seem to be peeved about th e implicit criticism rather than cross about his lack of comprehension.

Your statement is about level 1 of understanding FPGAs. They are much more involved than that. There are any number of considerations involved. I h ave no need to discuss that with you. This is not a design review. The ch oice of FPGA is not the topic I'm posting about.

I love your mention of a single sourced part as if any FPGA is not a single sourced part. LOL

Actually, I asked about the LQ100X package they have. It is so the pin out of one of their parts matches a competitor's part so they can steal socket s in production. Not a bad strategy.

I've always been amazed that no one does that even with their own lines, bu t it's not in the FPGA maker's interest. They operate on "design wins". O nce you have designed their part in those sales are pretty much a lock. Wh en a new family is out all focus is on the new family and they don't try to sell the older parts at all even if the new ones are not quite as suitable for some particular app. Making a new family pin compatible with an old o ne doesn't get them any NEW design wins.

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  Rick C. 

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Reply to
Ricketty C

Yes, this project has many issues. Management is one of the big ones. "Th e FPGA guy" is actually me, but it is not a small task and we've brought ot hers in to help. The first two are not as qualified, but they seem capable enough. One retired gentleman was off to a slow start, but is getting up to speed now. The other seems to be doing ok, but doesn't interact much so I have to ask him for status and I'm not looking to be a manager.

As to the schedule, we don't really have one. I came onto the project afte r they had done two batches of board both of which were fatally flawed by t ruly amateur mistakes by a very non-amateur board designer. He allowed the software to add thermal breaks to the thermal pads needed for cooling the chips!!! That was just the most glaring. Those boards have been butchered to be at all useful.

On rev 2 we are changing a lot, 32 bit ARM instead of the 8 bit Arduino CPU , new motor controller and others. Then someone, nervous of the whole soft ware validation thing though moving the alarms to an FPGA would make that e asier from the suggestion by a much more part time advisor. I'm the only g uy on the team with FPGA experience so I volunteered to do it. Then the ta sk grew by the day... lol

So the software people are doing mostly nothing since they want the hardwar e interface to be nailed to the wall before they start. The mechanicals ar e still in flux, we seem to pick a new motor every other week. We have no requirements and no test criteria. I had asked for requirements documents about the time we switched to the ARM processor so we could pick the "right " part. They put together something pretty weak for the system level, but I was told we "didn't have time" to do that for the board. One of the firs t things a new board designer asked for was a requirements document! There is a "check list" that they are treating as "requirements". lol A spread sheet I prepared to calculate the ranges of the various sensors traceable from measured quantity to ADC output is now treated as a gospel. But it ha s no data on resolution requirements and I can't get that from the lead guy !

Yeah, in many ways it is a disaster of a project. But the motor and mechan icals may be settling down. We have enough people on the project to get th ings done. I have written a requirements document for the FPGA (I wouldn't start without that) and now I'm going to have to do all the work of turnin g that into a design spec while the new guys do the fun work of coding. :(

I'm not going to walk away as yet. But by the new year I have other things to do and will probably leave the project one way or the other.

Oh, the new guy was talking today about working on the part I've been codin g lately, the UI. I might just give that to him so he has something to do. He seems like he won't even start until he has an eval board to work with . He's used to big dollar projects for sure! I'm very comfortable working on a shoestring.

Thanks for listening.

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  Rick C. 

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Reply to
Ricketty C

I let my people, and myself, do financially sub-optimal things, and peek into likely dead-end alleys, because we might learn something cool.

Realistically, in most anything but consumer electronics, parts cost is in the noise and a modest engineeering diversion might turn out to be useful.

We do document anything that we learn, sucessful or not, and if we do something novel, we check the hell out of it. The most expensive thing that we can do is another rev.

Features can be hooks too, just flexibility that doesn't cost anything.

A bean counting manager wouldn't appreciate this kind of thinking.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

s about the same chance of making it to market as Trump has getting reelect ed. So we get a new guy in to help with the FPGA. He is from a background o f high speed comms and radar type work. Clearly he can handle this easily. We are using a 33 MHz clock rate but most of the processing is MUCH slower. ADCs sampling at 1 kHz sort of stuff.

he starts niggling about the choice of FPGA. He's worried that a startup co mpany's product is being used.

staying available to get very nervous about buying stuff from start-ups.

stablished company lost access to a fab from another reputable company. Cle arly reputable companies are inferior to startup companies as you say... wa it, that's not what you said. So anecdotal evidence, aka "one" experience i s not worth much.

anies stay in business, and can - and mostly do - negotiate a new supplier. When a start-up goes bust, it's usually gone.

rt from somebody more likely to keep it in production.

on knowledge of the facts.

t you want. Nothing in what you have written (and you haven't written all t hat much) has suggested that your start-up offered a unique selling point t hat let it do something that nobody else could offer, and your project does n't seem to be pushing any technical limits.

s all that many - but you haven't bothered to tell us why the FPGA from the start-up was good enough to justify going for a single-sourced part. You n ew guy doesn't seem to think that it was , and you seem to be peeved about the implicit criticism rather than cross about his lack of comprehension.

The discussion here is entirely level 1.

Of course they are.

None of which you have mentioned.

Nor probably the capacity,

ing about.

Not exactly. You did post a complaint about someone who didn't like your ch oice of FPGA, but your complaint was about his temerity in having his own opinion on the subject. The idea that he might have been onto something doe sn't seem to have entered your mind.

le sourced part. LOL

t of one of their parts matches a competitor's part so they can steal socke ts in production. Not a bad strategy.

So the LQ100X wouldn't be a single sourced part if you constrained the desi gn enough that the competitor's part could replace it.

It's going a back a long way, but the Place ICT7024 was a drop-in replaceme nt for a 22V10 - I first got to use one when I was cleaning up after a desi gner who never bothered to tolerance the timing in his designs. I was never all that enthusiastic about larger programmable logic chips bac k then - most of them drew enough current that they ran hot. The Philip's CoolRunner range was attractive, but I never got to design them into anythi ng.

, but it's not in the FPGA maker's interest. They operate on "design wins". Once you have designed their part in those sales are pretty much a lock. W hen a new family is out all focus is on the new family and they don't try t o sell the older parts at all even if the new ones are not quite as suitabl e for some particular app. Making a new family pin compatible with an old o ne doesn't get them any NEW design wins.

The world is full of people with serious tunnel vision.

--
Bil Sloman, Sydney
Reply to
Bill Sloman

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