Hi everyone,
I've recently received a booklet of a handful of 'design rules' that should mitigate the risk of Non Compliances to Radiated Emission requirements which sometimes might be severe in the UHF, L, S band (as per IEEE std 521-2002).
There are a couple of them though that I do not quite understand and I'd hope someone can cast some light on them. They concern mostly digital signals:
The inter-plane capacitance probably does a better job of coupling the two planes at S-band frequencies than the shorting vias. The broad-side radiati on from a dipole (actually a tripole in this case because you get "mirror c harges" above top and and below the lower ground plane) drops off rather fa ster than inverse square, and the track being buried between ground planes means that very little of the radio-frequency radiation originating at the track will make it out to the edge of the board.
Source terminating a track means that you only get half the signal amplitud e going down the track that you'd get if you drove it directly. this isn't exactly RC filtering, but it's significant. If you terminate the track at t he far end as well you kill off reflections twice as fast as you do with si ngle termination. Again, it's not "R/C" filtering, but it does help.
Whoever wrote the note should probably go back to school ...
-- Bill Sloman, Sydney
Hi Bill,
Bill Sloman wrote: []
That's also what I thought, the small 'distributed' capacitance actually does already link the two planes, on top of that there are typically several vias which will connect them anyway.
The UHF though may come out if no vias are foreseen on the perimeter and the track is close to the border.
we normally don't terminate at the end of a clock signal from an oscillator. Typically we are working with > Here I understand the need to match the line impedance, mostly to have a
Who said the customer is always right???
Al
On Thu, 09 Oct 2014 23:50:30 -0700, alb wrote:
Obviously, to minimize the subtraction of all those, it's also best to make that stripline THIN!.
Back to current mirroring. You can calculate the the effect of stitching as a half wave resonator. Remember to take the sqrt(epsilon) slows C down a bit. So at the frequency EXACTLY half wave distance of stitching, there is effectively NO stitching. The point is that a GND plane only acts like a GND plane *IF* it is humongous. Stitching kind of brings the concept of a huge GND plane back to a PCB. Surprised they did not mention in the rules about the 3:1 rule. To keep a high speed trace at least the distance of 3x the separation between the planes away from any other stuff. You can see that effect using femm 4.2 Difficult to make this distance? Right. So you're back to side traces following along. And due to minimum etch rules you end up with that distance, but at least it's very, very quiet compared. I'm serious about studying current paths in a GND plane. For example, everyone knows the current is 'mirrored in the GND structure, a lot of people don't realize how important it is to HAVE a GND plane, a BIG GND plane, because those mirrored currents extend way out in it. Again, get femm 4.2 Actually if you plot the mirrored currents, you can find some going the WRONG way to make their way about! I hope they talked about using several tiny vias, instead of a single giant via. And of course 'one cutout per via, never two in the same cutout' type suggestions.
Actually the 'swirling' currents in the planes can come out, not just at the edges.
For example, most people know that running high speed traces on a PCB launches RFI/EMI, because obviously part of the field of the transmission line extends out into space. So, burying, using stripline that is really, really closed will 'solve' that, because ALL the fields are now inside the PCB. NOT! Several things happen 1. finite conductivity of the plane material 1/2 oz copper, 1 oz copper etc causes 'areas' of current, and worse 2. to use the PCB you've cut little holes everywhere in your beautiful GND plane, so it is NO LONGER A GND plane! RFI/EMI measurements at NRTL's will show you that comparing emanations from PCB's that have moved high speed from surface to a buried trace typcially only drops those emanations around 14 dB!!! Not the expected 100+ dB Why? swirling currents and every cutout for every via adds a small bit of damage.
arrrgggg! you're working in DC!!! Also use lousy material, like FR4, which has signicifant losses at the truly 'high' frequencies. THEN that series resistor really acts like an RC filter.
Actually to destroy resonances, where the signal can ring back and forth more than once, you only need to terminate ONE end of a line. You see the ringing can only go once along the line 'til it hits the match and poof! it's gone.
In defense of the author of your list of rules, it is far easier to write about specifics than it is to write about generics. I once saw a PCB that did everything WRONG but was 'quieter' than the PCB where everything was done correctly! I should say all the rules were implemented correctly, because by definition being worse it couldn't have been 'done correctly'. FWIW, neither PCB passed compliance, the 'wrong' PCB was just quieter.
Unless they are power and ground planes!
That describes source termination. It does not act like an RC lowpass, because the trace is a transmissiopn line, not a capacitor. The step at the end of the line will be as fast as the step coming out of the driver, barring hf line losses in the line itself. Nanosecond edges on normal PCB traces arrive looking pretty much like the drive waveform.
You will get an RC sort of attenuation if the source resistor is higher than the line impedance, deliberately mismatched.
End termination works too, and gives the same waveform at the end of the line. Source term can make a bit less EMI because the driver peak current is lower. Sometimes you can't do source termination, like when there are intermediate things to drive.
LT Spice has transmission line models, pulse generators, and resistors. Fun to play with.
No, you're right. Matched source termination gives a fast rise, full amplitude signal at the far end of the line, not an RC effect.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
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The ground planes do have a finite resistance per unit area, so the return current circulating in the ground planes does create voltage drops, which d o radiate. Nothing like as much as exposed microstrip, but it's detectable.
Not all that far. To model the external field you can put an equal and oppo site charge on a hypothetical "mirror" microstrip run under the ground plan e. This creates a zero electric potential at the ground plane and lets you do your calculations with a pair of point/line charges, which makes the sum s simpler. The "dipole" field drops a lot faster than inverse square.
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Slots that are longer than a quarter wave-length can get embarrassing, but little holes are less of a worry. It helps if the holes' maximum dimensions are comparable with, or less than, the spacing between the ground planes.
Surface mount parts and small plated-through vias make life easier than thr ough-hole parts and vias made with component leads or pins.
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The radiation from a microstrip over ground-plane is typically already a lo t lower than that from a bare trace. Adding a second ground-plane above it
- to turn it into a stripline - does make things better, but they weren't t oo bad to start with. Converting microstrip which is dispersive, into strip
-line which nominally isn't, can also be a good idea for other reasons.
Not exactly. You can have loads of problems from reflections when working w ith TTL at 10MHz - I've had fun cleaning up after people who weren't clued up about transmission line effects.
Not all that like an RC filter.
Depends how picky you are. Transmission line impedances are rarely spot-on, and termination resistors tend to be 1% and 2% parts at best. A single ter mination resistor rarely does a perfect job, and double termination can be useful.
It helps if you read a set of old ECL applications notes at some point. Mos t of them were written for engineers who had never heard of a transmission line, and they do tend to spell out the basics.
-- Bill Sloman, Sydney
Exactly, Fast rise and fall times can be nice emitters. That's why products need to be re-evaluated if standard logic, CD or LS is replace by drop in faster High speed CMOS logic or faster LS.
As they say "Speed Kills".
Cheers
It's not necessary to put the signal between planes but it can help. It's often impossible to get them all in the interior and with SMT devices the traces have to be on the surface somewhere. It's often better to leave them there than to have vias to the inner planes.
Adjust the spacing of the stitching accordingly. The idea of the edge stitching is to keep the inner planes from radiating out the edge.
A match may not be the "best" solution. A higher value resistor will slow the rise time according to the R (resistor) C (line capacitance). For many lower frequency clocks (still with high edge rates), I add an additional series pad for a ferrite and a shunt pad to add a cap. I rarely use them but it's easier to include the pads than to hack in the parts later.
Then you link them with capacitors - as you've told us you do, as a matter of routine.
Sure you can - double termination halves the voltage swing all the way alon g the transmission line. If you can live with it at the far end, you can li ve with it along the line.
Source termination with no terminating resistor at the end of the line is a different case; the out-going waveform is half the final amplitude, and th e reflection from the unterminated far end of the line is what brings up th e final amplitude.
And it's not the "peak" current which is lower. Charging up an unterminated transmission line through a source termination takes a current which is dr awn for the period it takes for the signal to propagate to the open end of the transmission line and get reflected back to the driver - twice the prop agation delay time of the transmission line. There's no peak in the process - it's more of a mesa. The current goes up, stays high for a bit, then goe s back to normal.
-- Bill Sloman, Sydney
If the transition time of the signal gets shorter than the propagation delays across the circuit you do tend to run into problems.
With vehicular traffic, high speeds in heavily built up areas is lot more dangerous than speeding on long open highways. With circuit design, the opposite is true.
-- Bill Sloman, Sydney
I did a ECL board to test a competitors part. [I've only designed NMOS/CMOS/BICMOS] If you look at the tolerance of the trace and space between planes, the notion of controlled impedance is as likely as tax cuts increasing revenue.
This thread does indicate that somebody who knows what they are doing should write a document on EMI reducing techniques. Buf at some point, maybe it is more economical just to shield the finished product rather than agonize over the PCB layout IF the EMI isn't effecting performance of the product.
Not exactly on the topic, but I've seen so many PCB hacks trying to keep digital and analog ground isolated that I have little faith in any of them.
Nah, see -- it's distance that matters. Short distances, like... the distance a bullet travels to its target. Which, coincidentally, is an example of what tends to occur in dense urban areas of the U.S.! :^)
Tim
-- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
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When I was working at Cambridge Instruments in the 1980's we switched a num ber of old through-hole component boards from double-sided to four-layer by adding inner ground and power (+5V) planes. We didn't bother changing the layouts by removing the existing 0V and +5V tracks - just hooked them up to the buried layers where existing pins went through the board.
Loads of EMI problems went away, and where we'd had to put grounded alumini um screens between boards before, we could leave them off between the four layer boards.
Shielding the finished product is nowhere near as effective as burying a gr ound plane inside a board.
m.
Hacks after component placement aren't nearly as effective as putting the c omponents, and the current paths to and from the components in the right pl ace.
We did clean up a few cranky boards by relatively drastic work on placement and layout. Final test complained that the revised boards still had proble ms from time to time, but conceded that the residual problems were easier t o fix.
Earlier - when I was working at EMI Central Research - we got given a produ ction pre-amplifier board to put into our clinical trials prototype. My bos s and I looked it over, and noticed that the layout around the uA733 amplif ier routed the inputs close to the outputs. We decided to flip the amplifie r 180 degrees, scraped the local tracking off the photographic master we'd been given, put in new tracks with layout tape, had the revised artwork tur ned into a new photo-master and made 21 boards for our own use - which work ed fine. The authors of the horrible layout ignored our warning, made 210 o f their boards, and ended having to hack a two-transistor amplifier onto ea ch of them because their uA733's couldn't be stopped from oscillating ...
-- Bill Sloman, Sydney
This is the basic microstrip construction.
Openings longer than about lamda/2 will radiate as hell, so that would be acceptable for frequencies below 1 GHz. I have used 1 cm between shorts for L-band.
Rise/fall times.
No. Microstrip runs above a ground plane. Strip-line runs between ground planes.
Not if the trace is well back from the edge. Slot antenna can be very effective, but you've got to have current circulating around them to make them "radiate like hell".
-- Bill Sloman, Sydney
Oh. That kind of "speed". If I'd meant amphetamines, that's word I'd have used.
Martin Riddle might not have sat through quite as many chemistry lectures.
-- Bill Sloman, Sydney
Thanks for the hint, I started reading about 'stitching' and is actually an interesting practice. I also learned that typically the stitching would start to be efficient if spacing is below lambda/8. That means the suggested 5 cm would dump frequencies starting from ~750MHz.
Since not so long we started to connect DGND and MGND in AC, with a series of caps. In reality the caps are not mounted and if we are in trouble during EMC testing we may still have some margin to add those caps. This technique allows to meet two often considered contraddicting requirements:
The first one is done in order to avoid return currents finding their way on the mechanical structure and radiating, while the second one is intended for high frequencies for which the star point is too far away to be considered a good ground point.
The AC connection then would allow a 'close' way out to MGND which will prevent them to bounce around.
[]I certainly agree that there'll be emission, the question is how to design for reducing that risk w.r.t. requirements. Our notches are around the GPS and SBand ranges at levels of 0 dBuV/m and 4.5 dBuV/m respectively.
The 12th harmonic of our main clock can easily hit the GPS band (1180-1280 MHz) and there's where problems may arise.
but how thin is THIN?
Our equipments are normally enclosed in aluminum boxes and there's little chance to radiate if connectors mounting are properly done to avoid holes, but the problem is that often the internally radiated field couples with connectors or other traces and suddenly the CE starts to be an issue.
typically our high speed digital lines are not very many, so we should be able to get that rule in place, at least for the critical ones. But it is true that depends a lot on the product; we've recently entered into a niche market where we need to have high speed lines for big busses as well.
what would happen with two vias in the same cutout? I didn't follow.
Uhm, how can you keep the 'important' edges if you dump the high frequencies components? I guess the issue is not dumping the high frequencies, rather guiding them out of the box in a controlled way. Am I wrong?
Al
Hi Miso,
miso wrote: []
Shielding the entire product may a) not be possible and b) not be a complete solution, especially considering that if your radiated field is happily resonating inside your box, it will surely find it's way out through cables.
Additionally I do not believe that confining the radiated field is good practice anyhow, since it will eventually couple with your exposed traces and cause problems.
IMHO you need to find a controlled path out for those fields, down to your Ground potential.
It depends on the application. I typically do insist for separating AGND and DGND across ADCs or DACs since DGND is typically too noisy for the analog front-end and digital filtering to get rid of are not always an option.
Al
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