dpak heat sinking on a multilayer board

The LM1117 data sheet shows thermal resistances for the DPAK mounted on various copper patterns. They got from 104 to 47 K/w.

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I did some measurements on an old board. This is a 6-layer board with layer 3 ground plane. Temps are package top as seen on an IR imager.

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No vias, so all the cooling is from the layer 1 copper.

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That one has vias and pours on 1, 2, and 6.

This could be better. I hand-soldered the chips and I doubt that I got full solder flow under the tabs. Layer 2 ground plane would be better, too.

So the National thing is pessimistic compared to what you can do on a multilayer board.

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin
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I'm not clear on what you mean. They did tests with up to 1 square inch of copper on one side of the board or up to a half square inch on both sides of the board. Your tests were on what looks like at least two square inches on one side with an inner plane (which is not useless without vias) or three layers of planes with some six square inches each. If by "pessimistic" you mean they didn't use the extent of cooling that you did, then, yes, their results were pessimistic. They are even more pessimistic if you add a heat sink and water cool the part. Is any part of this a surprise?

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Rick
Reply to
rickman

Is it about... (scratch scratch.. :^) three times as much as I'd get on a two layer board? George H.

Reply to
George Herold

I think more / smaller vias will help.

Cheers

Reply to
Martin Riddle

What's impressive, in a negative sort of way, is that the two cases don't have radically different thetas. One is about 0.8 sq inch with one working pour, and the other is about 2.2 with three pours.

What might help would be heavier copper on layer 1. Looks like heat spreading close-in to the package is a big component of theta.

Or go to a D2PAK, which has a bigger footprint.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Yes, yes it is. Via-in-pad helps greatly, especially if you can stake them to all four layers. Not to mention get the board fabbed with 2oz everywhere. :)

Tim

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Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

Via-in-pad gets really expensive, particularly if your groundrules call for filled (in-pad) vias. I fairly regularly do 2oz. but it does cause grief with things like BGAs.

Reply to
krw

Seems to me it would be a lot easier to construct a heat sink of copper that gets soldered to the tab and folds up. I suppose having a heat sink tab under the part makes the device hard to solder to the board. The tab wouldn't need to be very thick. Maybe the board could be routed under the DPAK tab and a heat sink attached from the back. Going vertical would provide hugely better heat sinking. It wouldn't need to be very big to achieve a few K/W.

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Rick
Reply to
rickman

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-Lasse

Reply to
Lasse Langwadt Christensen

We already use the 7106 part. It does waste a fair amount of board area, its footprint and the area under its wings where it's best to not put parts. Thermalloy doesn't specify still-air theta for those surface-mount sinks. The graphs begin at 100 or 150 FPM.

The cheapest heat sink is still no heat sink. So I'd like to use the board as the heat sink if I can.

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Board area is not free, but if you have copious room on your board, I suppose that is cheaper than a $0.70 heat sink. But with no air flow, it takes a lot more board area than with even a little air movement. The Thermalloy graphs are not hard to extrapolate to near micro air current levels. The 7106 looks like it would be around 9 K/W.

On the other hand, the two graphs they give for the 7106 don't jibe. The temp rise from interface to ambient indicates a thermal resistance over 16 K/W range. The graph for thermal resistance vs. airflow shows a value ranging between 4 and 9 K/W.

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Rick
Reply to
rickman

That is impressive in a negative way. Spreading is a killer.

Cheers, James

Reply to
dagmargoodboat

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