Dot allowed as characters allowed in netlist?

OK, one more level of indirection:

what is that?

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics

I don't like busses. One of my guys once named a bus ADDR[15:0] on one sheet and ADDR[0:15] on another. So we had to write a program to shuffle the programming file for an EPROM.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics

Once you have a program, draw a big diagonal line across the top of the cards.

You could also color-code subroutines and data blocks and such.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics

That's easy for YOU to say: you got the box of 24!

Actually, a box has 2,000 cards.

This is mentioned in a number of places:

(url was double-checked and correct)

The problem with a diagonal line is it may not give the exact sequence position of every card, especially for a large deck.

Also mentioned.

Can be worse. Designing an ultrasound machine a 32-bit analog bus between boards became mangled that way. So a cable had to be made that had sort of a Moebius loop in it. Since this was all coaxes it was quite stiff, meaning shield and bezel could not be locked in place anymore.

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Regards, Joerg 

http://www.analogconsultants.com/

The remedial spelling didn't work. It's "semesters".

And decimal points are smaller than other characters, and less reliably det ectable in consequence. That's elementary physics ...

But the people who read the schematics haven't been up-graded in the same w ay.

Professional audio, and a whole lot of other high-value electronics, would beg to differ. It's certainly the drawing convention that was in use where I worked in the UK and the Netherlands, on million-dollar electron-beam mic rofabricators and other high end gear.

US physicists have funny ideas about electronics, which show up from time t o time Rev.Sci. Instrum. Phil Hobbs is more the exception than the rule.

--
Bill Sloman, Sydney

A group of engineers from Europe joined a US team. A prototype had to be made in the machine shop. A few days and $800 cross-charged Dollars later ... "This is way off in size!" ... "No, it's accurate. For example, you said this side should be 342 mils and it is" (holding caliper to it) ... "But, but, no, with mil I meant millimeters".

--
Regards, Joerg 

http://www.analogconsultants.com/

The x's like Lasse showed aren't very customary anymore these days. Some CAD systems could even choke on those if you placed some.

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Regards, Joerg 

http://www.analogconsultants.com/

There is a strong tendency among tekkies to automate things that they should just do themselves. Why do the grunt work of checking your design or code when you can buy some fancy tools/toys to do it for you?

Problem is, the fancy tools can't understand your parts, requirements, or intent.

Some tools, like PCB clearance and connectivity checks are great and don't (much) encourage bad habits. Some tools switch off thinking.

But you *can* blame the tools/toys when the board doesn't work.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics

That's really dumb. ...but ours is all that and worse.

...and you didn't check that in your design review? Tsk. Tsk.

That's the _one_ thing I like about our schematic entry system. Busses are really just a collection of wires. The individual strands in the bundle can be named anything. They make the schematics more readable but there is no implied order (though that should never be a problem - you should know big-endian from little-endian). So, I'll have an I2C bus, for instance, named "UC_DACS_I2C" (UC owns the bus, it used for the DACs, and its type is I2C). The strands of the bundle might be named "UC_DACS_SDA", "UC_DACS_SCL", "UC_DACS_DAC0IRQ", and "UC_DACS_DAC1IRQ".

Until some day it doesn't. Or does it except for a few spots.

It's like with cars, for example anti-lock brakes. People think they can now just stomp on it and it'll be alright. Until that not so sunny day when the road is slick and the fancy system prevents their car from stopping.

--
Regards, Joerg 

http://www.analogconsultants.com/

How does that relate to electronics. I suggest they should be fired anyway (or more accurately, shouldn't have been hired).

I'm thinking about the pin use rules on uPs or FPGAs or, worse, SOCs.

In an SOC, some pins can be clocks, or not. There are bank voltages that determine the logic levels and rules of clumps of pins. Some pins have multiple programmable functions, like ADC or GPIO. Some pins have hard-defined functions during configuration but become IOs later; some never become i/o. Some pins are available only to the uP and some only to the fabric. Some pins are single-ended or can be one of a differential pair. Things like logic levels and drive strengths are programmable.

How do you explain all that to an automated checker?

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com

It checks for potential show-stoppers by flagging unconnected inputs, two outputs tied together, an output connected to the rail, rails shorted to each other, missing junction dots, and so on. Some of that may be deliberate and ok in which case a good CAD system should offer an "allow" check box for each flagged observation. In Eagle that remains stored so if I continue work on a schematic it won't flag the same observations again after I clicked "allow".

Some ERC functions are a bit nonsensical. For example, I get a lot of false positives like "VCC connected to V+" or "+5V connected to V+" because a component symbol happened to call the pin V+ and not VCC or

+5V. So I have to click all those off on the ERC list. It's ok, I'd rather it errs on the cautious side than discovering an "Oh dang!" after the boards come back.

Same with the design rule checks on layouts. I remember a guy who didn't run it and then had umpteen via shorts to the ground plane. All those had to be drilled out and lots of air wires were needed.

--
Regards, Joerg 

http://www.analogconsultants.com/

Am 13.03.2018 um 22:20 schrieb Joerg:

Not at all.

Like, who cares a f*uk?

-- Kevin Aylward

- SuperSpice

And of Of course...SS don't have that problem. I pre-process all M, Meg, m,

4k7 to what Spice expects.

This includes all string numbers for subckt parameters.

-- Kevin Aylward

- SuperSpice