I have an application where I need 3 DACs controlled by a micro.
Right now I have a quad DAC chip external to the processor. If a small processor had 3 or more DACs, it could save me a bit of space and signal connections.
16 bitters preferred but 12 bit may work.
I can't use PWM stuff because I need frequency response and low noise at the same time.
I know that the 68HC11F (old part) had C/2C ladders instead of R/2R -- I wonder if that's the case for all of them, and the resistors just can't be done?
Seems like you could make a dynamic DAC, put a C/2C ladder into a sample & hold, and keep updating it -- but I dunno.
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Tim Wescott
Control system and signal processing consulting
Unfortunately, it looks like it is bigger than the micro plus DAC chip method but it certainly does have the number of DACs. I may still go with it because it has enough performance that I may be able to bring other functions on board.
Unless you use a Cyrpess PSoC as the micro and employ its S/C filter blocks in a somewhat unorthodox manner. I have never done it but in case someone is interested this seems to explain it:
If I was going to go with a different CPU core, I'd most likely go with the ARM. It seems to be the one that has become the most popular.
Right now I am using a micro with two DACs from Scilabs. It is very fast and has the advantages of the 8051 instruction set. 100MIPs of flinging bytes around can get things done in a hurry.
Read carefully about the AD part. Especially about the PLA capabilities. I was caught there. Don't remember exactly what it was but I think I couldn't use it to directly trigger some AD or DA operation as could have been expected. (was doing a multibit SD ADC)
I want to pump the ADC at lets say CLOCK/2060 I think I can do this.
It looks like the ADC and DAC interrupt (the same one) will need to be coded in assembly. Basically, I need to read the ADC and write the DACs in a tight section of code that sort of looks like this:
The DACs always are based on the previous ADC values. The math to work out the scale factors will be spread over many ADC read steps. UpdateScales may be in C but even it looks like it may have to be in assembly to get it done fast enough. I will be counting machine cycles.
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