Diode across gate resistor of MOSFET

Diode??? On gate??..Then again I'm still learning smps. I think a bipolar transistor can discharge the gate the fastest. Look at the internal design of mosfet driver IC's. D from BC

Comments: It depends

1) Sometimes you want to cut back on crossover shoot-through. 2) Sometimes you want to cut back on the switching losses. 3) Your right, the edges will generate more EMI, but I have found that good cabling will keep the significant radiation below 25 MHz and out of sight of the FCC. 4) The reason why turn-off is safer than turn-on is that the gain is lower when the device is turned off vs. when it is turned on. 5) When I use a diode ( I don't need it in my present design) I use a Schottky in order not to worry about speed or reverse recovery. Probably overkill. 6) Since your concerned about stray inductance; remember you have to dump the inductive stored energy somewhere and sometime. Know where it's going; at least qualitatively, and quantitatively is you aren't really (5:1) safe.

Ray

The 'damped ringing' on a mosfet drain is much more likely to be associated with turn-off than turn-on.

At mosfet turn on, 'damped ringing' may occur on other coupled nodes where other semiconductors are being forced to turn off. The active mosfet cannot damp these nodes, it can only crudely limit the initial rate of reverse current and its peak. The total removed charge is unaffected - damping has to be performed locally, where the disturbance occurs.

Besides other posted advice, you've also got to remember that the mosfet turn on threshold is fixed and is not likely to be half of the drive peak voltage - this makes it unlikely that turn on and turn off speeds are equal - if that was your original intention.

The high forward turn-on overvoltage and higher conductive impedance of regular diodes will reduce their effectiveness in more demanding situations. Remember that you are asking the part to perform at high pulse current for short intervals.

Externally induced dVDS/dt can force a mosfet to turn on, if the gate resistor or drive impedance is too large.

RL

Hi Ray, thanks for answering. when you mentioned the gain is lower when device is off, is it because the gain is proportional to (Vgs - Vth)^2, and when Vgs is small the d(ID)/d(Vgs) is also smaller?

For turnon/turnoff ringing you should refer to RL's comments. I spent about 10 minutes trying to find an excuse for my mistake. Didn't find a good one. The typicall effect is in fact the turnoff due to dumping of the L energy into various capacitances including Cdg , which can turn the fet back on if the gate impedance to ground isn't low enough. If you end up with turnoff ringing you should probably prevent overshoot with a catch diode; the diode to the PS (or in some cases a zener to ground) has to be rated for the full current. Typically very little power, but high peak current. I have seen several instances where the catch diode is rated for power but gets blown away because the current rating is exceeded. In any case you don't want the transient dv/dt turning the FET back on because a lot of power can be dumped into the Fet during the turnon event. Checking the drain voltage in the application is a really good idea; better to be surprised in the lab than in the field. In my last application I put a series RC network between the drain and gate to control the rise and fall times. This was possible because I had plenty of power margin in the design. You usually don't have this leeway available.

Ray

I made a mistake with respect to the turn-off/turn-on; RL is correct. I spent about 10 minutes trying to think of an excuse for making the error but couldn't find a decent one. Don't forget to check the drain output in the real application to make sure you don't need catch diodes. If you do make sure they are rated for the full current; not just the wattage.

Ray