The LT1012 has much better Vos and Vos drift specs. Bias current can be as bad as 100pA over temperature for the most expensive grade, which which would contribute +/-10% error on the 1nA scale. You could use a much lower value sense resistor with the LT1012 because of the better Vos.
If this model is used, it should be 10s of pA, not fA or nA.
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Try to avoid the PCB entirely (eg. use a PTFE standoff for the single critical node in your circuit (bottom end of R1/output/non inverting input of U5). Avoid no-clean flux for the rest.
Best regards, Spehro Pefhany
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Works for me, from Chicago, Fremont CA, Canada and Netherlands. Just hit "Télécharger ce fichier"
Best regards, Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
Yeah, that's the one. The PTFE (Teflon) standoff is just for mechanical integrity. But only that one node. Everything else is completely non-critical (for a precision analog circuit, that is).
Best regards, Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
The common-mode rejection of the instrumentation amplifier will matter a lot. In Spice, all the 10K and 100K resistors are perfect; in real life, they aren't. And the front-end opamps are obviously identical, being the same model, but in real life they won't be.
1 na across 1M is 1 millivolt. Your compliance was specified to be up to 10 volts. A 1% error in 1 mV is 10 microvolts. 10 uV is 1 PPM of 10 volts. So the diffamp needs 1e6:1 common-mode rejection and 10 microvolts or less DC offset.
It would help to increase the value of the sense resistor to, say, 1G ohms, so you'd have a volt of current-sense signal to work with.
I'd also be surprised if this loop were AC stable, especially if you start including real-life stray capacitances and various load impedances.
Hey, how about this?
ftp://jjlarkin.lmi.net/Isrc_Boot.JPG
This just forces 1 volt across the sense resistor. Loop gain is 1, so it's easy to stabilize. The CMOS opamp will need a modest negative power supply if the output compliance is to go all the way to ground.
I keep forgetting what a cool concept bootstrapping is.
I hooked my Keithley electrometer thing to some random PCB traces and applied fingerprints and heavy breathing and such. Leakages were way, way below the 1nA level.
Here's a 1G leaded resistor.
ftp://jjlarkin.lmi.net/Keithley_1gig.JPG
Heavy fingerprinting and breath attacks on the surface of the resistor and on the Pomona plug carrier have no visible effect on the measured resistance.
On a sunny day (Sun, 24 Jul 2011 10:52:22 -0700) it happened John Larkin wrote in :
I think the top opamp input polarity is reversed? You could do it with one opamp perhaps, but I do not understand this ciruit. But I could finally access your ftp site again with a trick.
Merci. Those work, and there's even a pretty woman above the schematic :-)
The current source could also be done with just one opamp and a low leakage transistor. But probably you also want to switch ranges and then you'll have to find a low leakage multiplexer or transistors. Either expensive ones with guaranteed values or cheap ones that are tested and/or cherry-picked. Cherry-picking isn't necessarily bad practice, even reputable equipment manufacturers have done it.
You can still buy teflon posts, but expensive:
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Also ceramic core circuit board:
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Not sure where you could still buy the ceramic solder strips. John Larkin found a large quantity of them a while ago. If you buy him a beer at Zeitgeist maybe he'll give you some :-)
It can be worse. This one almost reduced the purchasing manager of a client to tears: His kid looked him in the eyes for a long time and then said "Dad, I love you and I don't want you to die on me".
The way I see it is the CMOS opamp lifts up the bottom of the 1V source by exactly the voltage ar R_L. So there is always 1V across Rs, since the top is 1V higher than the bottom. The opamp has very low input bias current so almost all of the the 1V/Rs current goes into R_L.
As John Larkin points out in a later post the top opamp may not be needed (provided the effect of load current on the 1V divider is allowed for I guess). For the 1G shown it can easily be made negligible, for example a 200 ohm / 1k divider.
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