Silly rabbit! Schematics are for communication and documentation, not artistic appreciation! You can make all the artistic touches you want, on the glossy sales brochure, but DON'T DO THAT TO THE SCHEMATIC.
Clueless, as always.
If you're drawing an array like a RAM, maybe, but not for an ordinary diagram like the OP.
And MIL STD.
es a Vishay VO14642AT Solid State Relay to connect and disconnect an extern al battery to the main circuit. See the link below. The off-state leakage current of this device is supposed to be less than 1 microampere, but when the device is inserted into the circuit with no bias on the LED, the devic e is passing about 3ma with a 500mv drop across the output terminal when 9V DC is applied. It is enough so the DC-DC converter on the output of the i solator is producing a full 5V out with no load. What am I doing wrong? W hen the isolator is removed, the voltage drops to zero, so the leak does no t appear to be anywhere else in the circuit.
Was it damaged by handling? *EOS/ESD? weird design...
I agree about drafting stds. I learnt in mid70's in Aerospace from Mil Stds . Big dots were for microfiche repro. Simple dwgs had to avoid 4 way crossi ngs. I only objected to the excess spacing of J size dwgs and got them to fit on size A. HP journals had even bigger dots.:)
But not hard to read. I can read Japanese schematics easier however.
Sure, but the statement that dotted-crossed lines should never be done, "it's been a standard for 1000 years", is absolute. My point is that it's _not_ absolute. I'd prefer not to have crossed wires connect but sometimes the alternative is even worse.
That's not the universe of electronics. It sure isn't in our design rules (and hasn't been anywhere I've worked - even military projects). Absolutes, such as this, are counterproductive.
people will argue about anything these days.
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