I'm designing a benchtop gadget that will uses a 7020 ZINQ SOC chip, which is an FPGA with two ARM cores on-chip. I want to save a user's last setup when power fails, and restore it at powerup. The 7020 has on-chip batter-backed ram, but apparently only to store some encryption key, not for general use. So I need an external ram and a battery.
Digikey offers exactly 4000 choices when I do a search for SPI interfaced SRAM. None of the few that I've looked at mention the battery interface, specifically whether how to ensure data integrity and low Vcc current through the power fail. I've done the powerdown interface logic myself in the past, for parallel SRAMs, but it's a nuisance.
Anybody know of a serial SRAM that includes the battery/powerdown bits?
I need less than a kilobyte of storage for the current setup. We could SPI out the setup every few seconds. Maybe pingpong two or so copies with checksums, in case power dies in the middle of a write.
I guess we could use serial flash, but write endurance is an issue. Maybe a huge (like 128 Mbit) serial flash, with thousands of copies of the setup, would make more sense than an SRAM and a battery. Some algorithm, run at powerup, could find the most recent valid setup image. 100K write cycles seems to be a common spec, which is scary.
I could write the setup only if it changes, on the theory that most of the time nobody is twiddling knobs. That would improve endurance.