AoE x-Chpaters - 1x.3 Capacitors

Here's another x-Chapter DRAFT section to examine and think about. This is 1x.3, about capacitors. The x-Chapters are about parasitic aspects, etc. Please report back with comments, suggestions, and by all means, typos and errors.

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--
 Thanks, 
    - Win
Reply to
Winfield Hill
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1x.3.1 Shouldn't it be "ravages of time"?

John

Reply to
jrwalliker

For electrolytics and possibly other types manufacturers have so good contr ol of the process that they place the nominal value at -20% to fine optimiz e production cost

Those bastards ?

One overlooked item about electrolytics is that very fast charge or dischar ge will blow them up

Manufacturers make special caps with modified outer film that handles those transients

Beware of cheap Chinese caps with good specs. Caps needs thorough testing t o be approved taking several years

Cheers

Klaus

Reply to
Klaus Kragelund

In 1x.3.12: "Ceramic surface-mount chip capacitors are vulnerable to damage from flexure of the circuit board; we find ourselves cringing and grinding our teeth when forcing a CPU cooling fan, or memory card, into a sagging computer motherboard as instructed."

The same problem occurs already in prodcution when these MLCCs are placed close to a V-cut in a PCB. During the separation of the PCBs the stress through the FR4 creates micro-cracks in the cap, leading to failure _after some time_. For guidelines see:

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"Surface-mount multilayer ceramic chip capacitors (MLCCs) must be oriented with the long side parallel to the V-groove cut if less than

0.25 in. (6.35 mm) away from the score line and kept 0.119 in. (3 mm) away regardless. This becomes more important with the larger-size caps and with certain cap dielectrics. The surface stress, caused by forcing the depaneling blade into the V-groove, transfers through the board surface to the rigid solder joints, and then to the component bodies. This can fracture them if they're too close to the V-groove. Orienting the long edge of the capacitor body parallel to the edge minimizes the risk of body fracture (Fig. 2, again)."

Arie de Muijnck

Reply to
Arie de Muynck

I seem to remember someone mentioning that in some applications two caps in series mounted at 90 degrees is required to reduce the risk that both crack, short and catch fire

Reply to
Lasse Langwadt Christensen

Probably MIL or aviation spec? Apart from redesigning the problematic PCBs I also switched the critical caps to the newer automotive versions, almost the same price, but they have some internal flexibility to prevent the cracking. Examples:

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Arie de Muijnck

Reply to
Arie de Muynck

I think the flexibility is an alternative to the dual cap

Reply to
Lasse Langwadt Christensen

You can reverse aging in ceramic caps by baking them at around 60C for something like 48hrs. We had some year old ceramic muratas, that were off in measured capacitance. Put them in the oven for 2 days and then they measured very close to their printed values. I believe it was the same aging process. One of the manufacturers (Kemet I think) has an appnote.

Cheers

Reply to
Martin Riddle

Hah, I'm still thinking about conducting shells in magnetic fields. This is great though!

George H.

Reply to
George Herold

Very nice!

AIUI the reason for the profusion of NTC caps was the uniformly positive TCs of inductors. I remember a piece in my 1966 ARRL Handbook (which I got from my brother when he was finished with it, circa 1973) on how to use N750 caps to temperature-compensate a VFO.

Al-poly caps are available with a wide range of ESRs for the same capacitance, voltage rating, and size. This is pretty convenient for use with LDOs and other voltage regulators whose stability depends on particular ranges of ESR. Alternatively one can use a pulse-rated resistor in series with a super-low ESR cap.

Figure 1x.55 has no key to what the different marker types mean. It also isn't clear what the dotted lines mean--are they fits to different subsets of the data?

"To get a feel for magnitudes, note that a pair of plates 1 cm on a side (1 cm 2 ), separated by an air gap of 1 mm, has a capacitance of approximately 1 pF."

That's the _mutual_ capacitance. Each plate will also have a _self_ capacitance of the same order--sort of like the common-mode and differential input capacitance of an op amp. In Gaussian units, the unit of capacitance is the centimetre--an isolated sphere of radius 1 cm has a capacitance of 1 cm, which is about 1.12 pF. Neglecting the self-capacitance is a common error in RF calculations.

Re: drift with time. There's a significant effect on high-K ceramics due to soldering, which resets their aging curves and probably adds some thermal stress relaxation into the mix as well.

I really like your defense of plastic film caps. It's really worthwhile paying the extra assembly cost of through-hole film caps in precision analogue applications. There aren't as many of those as there used to be, but a lot remain, and film caps are indispensable. The higher-melting PPS and PEN surface mount ones aren't as good by a fair bit.

Good work pointing out the nasty practical effects of using piezoelectric dielectrics. Piezoelectricity in ceramics depends fairly sensitively on their temperature/voltate history, so the behaviour of a give capacitor may change fairly dramatically over time.

Figure 1x.70 is the best soakage plot I've ever seen. Kudos. the really shocking thing there is that 'brand K' C0Gs are ~30x worse than 'brand Y'. I normally assume that C0G is C0G, but apparently not when it comes to soakage!

In 1x.3.11, you talk about tantalums for power supplies without mentioning their tendency to detonate from too-high inrush currents. I never use tants on input supply rails. With care, they can be OK at the output of regulators, but my rule is never to put them on the power input to a board.

Bravi!

Cheers

Phil Hobbs

Reply to
Phil Hobbs

I built a 600 MHz coaxial ceramic resonator oscillator. The resonator has a near zero tempco, but the PCB capacitance is terrible, something like +900 PPM. So I had a batch of custom caps made, 3.3 pF N4700.

The NTC is in series with an NPO, so I could tweak the value of the NPO to tune the oscillator tempco.

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Anyhow, I have 4000 of these caps, if anybody wants a few. N4700 is severe.

You might mention that common MnO2 tantalum caps explode, literally detonate, from too much current, namely dV/dT, so are not good on power rails. They are reliable if peak current is limited.

Surface-mount film caps are usually bad news.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

tirsdag den 6. august 2019 kl. 03.56.38 UTC+2 skrev John Larkin:

yeh, I have an old pair of glasses with a chip right in the middle of one glass where it was hit by an exploding tantalum cap on board I was testing

Reply to
Lasse Langwadt Christensen

snip snip

Their voltage rating is also much reduced by soldering. Heat treating them afterwards can restore it. "what_a_cap_astrophe" talks about it.

NT

Reply to
tabbypurr

Thanks, another great aid to humanity. I haven't perused yet but didn't see any mention of mains input suppression capacitors, surge rated film with safety classifications.

My life lesson has been to wherever possible use X1 class over the cheaper X2 class.

piglet

Reply to
piglet

Figure 1x.51

Al2O5 - Shouldn't that be Al2O3 ?

Ta2O3 - Shouldn't that be Ta2O5 ?

Allan

Reply to
Allan Herriman

And I would call the MIMcap a "SiO2" cap rather than "Silicon" like varactors. It is odd to remember that all flash memory is just a bunch of capacitors that stay charged for a fairly long time.

Reply to
Chris Jones

The X1 types make great, cheap HV DC filter caps.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
John Larkin

Am 05.08.19 um 23:57 schrieb Winfield Hill:

An affect I had just a few days ago:

I was sick of FET amplifiers that develop a negative real part of input impedance above, say 50 KHz. Yes, you can damp that to death, but then

  1. the low noise is gone
  2. The > 1MHz bandwidth is gone
  3. stability is gone. Select at most 2 of the features to keep.

The problem is that the standard architecture CS FET, optional cascode, op amp for loop gain, feedback to source has simply too much delay.

As soon as the feedback loop is closed, the input FET is no longer common source. The source voltage is like 99% of the gate ac voltage, just a bit later. That smells like a capacitively loaded follower, and it oscillates like one if the conditions on the gate side are OK for that. Often enough, they are.

So I decided to build one without feedback. Distortion should be no problem when digging in the noise.

sqrt of Id, it was necessary to nail the Id to the wanted value,

30 mA or so in my case, total for one IF3602 pair.

simulation. Still too much, but that's a different problem. (the other sensitivity is Vgs over temp with different and opposite TC; in theory it's possible to find a stable O/P.)

For noise reasons it is necessary to use an input cap that is _much_ larger than for corner frequency reasons, so I wanted NOTHING on the input side, let alone a servo loop. Reaction times like a level crossing barrier.

That converged to something like that: <

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>

Now we come to the capacitor, C4 in this case. The CCS is needed, but not wanted for AC. There is a large capacitor at the source to connect it to GND AC-wise. Yes, I know, ugly.

But since the source voltage is only +600 mV (-Vgs for the operating current) it looked like 3 Digikey 493-4582-1-ND could do the job. Aluminium Poly 4700u 2.5V 10 mm dia, Nichicon.

But it resulted in this purple spectrum: <

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Nothing one wants that for a low noise amplifier. (absolute scale not calibrated)

DK 1189-1056-nd seemed OK. Cheap ALU 3300uF/10V 20% Rubycon. (green)

but resulted only in the blue trace.

It seems a capacitor for this application requires some luck, or money; a wet slug tantalum 4700u/25V was also OK, but cost 100 bucks.

What is the process behind this 1/f**3 rise??? When the effect is there, then it's 1/f**k, with k=3! It looks like capacitor quality determines only the corner frequency.

While I'm at it: Win, what for is R3 = 2R2 in the transistor noise test circuit Fig 8.92 of AOE3, with the jumper across it?

regards, Gerhard

Reply to
Gerhard Hoffmann

Am 07.08.19 um 04:15 schrieb Gerhard Hoffmann:

... s/aff/eff/

Reply to
Gerhard Hoffmann

Hmm, thought this sent, but it seems to have gone lost.

Overall very good, to the best of my knowledge.

Fig 1x.51 -- should be Al2O3, Ta2O5?

I suppose supercaps could be broken out into a few types as well, including those weird hybrid-ion thingies. Or further into batteries and general electric charge-based energy storage media... haha, well, that figure would span multiple pages, no need to go that far.

Varactors -- curious, has anyone made a MEMS variable cap yet? That would be interesting, probably not competitive with varactors though? I digress.

Fig 1x.52 could have one more blob, "transmission lines" I suppose?

I think it's amusing you left Fig 1x.61 in units of frequency -- perhaps you'll twig more people about using them as varactors. Or get more curses from failed attempts at it... :^)

May be worth noting that the capacitance decrease with frequency of Fig

1x.65 is equivalent to the damping factor of the previous section. Anywhere you have one, you necessarily have the other and vice versa. :)

Microphonics -- film caps do this to some extent as well (electrostriction moreso than piezoelectricity). Don't know that they're as microphonic as acoustically noisy, but it should be reciprocal, right?

Probably the more common case is film caps buzzing at mains frequency, especially when there's a lot of distortion.

Think I would rephrase the last paragraph of 1x.3.9 as: "Anywhere there's an electric field between the plates of a capacitor, and a mechanical force deforming those plates, microphonic and resonant effects exist. They're generally negligible though, and only exaggerated in certain materials."

Although re-reading it, I guess it says that, it just didn't grok right the first time?

1x.3.10.A -- now, I have a thing about bypassing, more generally PDN (power distribution network), so temper this accordingly; but anyway. The rule of thumb (the utilization quoted here), is generally alright for 2-layer designs, but by "generally" I mean "succeeds more often than it fails". It's typically overkill for multilayer boards, unless you need stupendously low impedances (usually CPU/FPGA Vcore stuff).

I think a discussion about PDN analysis would be more fruitful; probably not right here, but it would be good material for a new [sub]section, say?

(Unless you're editing it as we speak, and I'm about to be preempted again by your writing! :-) )

D.-- Don't discount ceramic caps -- specifically, C0G. It seems C0G materials handle /much/ more electric field before breakdown, so they store much more energy despite the low kappa. (In magnetics, it's the opposite: low mu higher energy density.)

Take for example, a 47nF 630V C0G 1812 (4.5 x 3.2 x 1.9 mm) that stores as much energy (9.3mJ) as a 33uF 25V 6.3mm dia. (5.2 mm height) electrolytic chip/can!

Only downside (other than the probably inconveniently high voltages) is the price...

There's also poled (electret) capacitors, which are still pretty boutique as far as I know, but they're out there. TDK CeraLink for example. Temperature sensitive, although I see some rated for reflow temperature now, without needing to be re-poled? What's up with that? Hmmm...

E. -- Worth noting that self-healing causes a hyperbolic decrease in capacitance, as self-healing starts as spots, giving way to chunks, and eventually bigger and bigger parts of the capacitor becomes disconnected.

They're also apparently sensitive to corrosion, which means (I assume) oxygen or water diffusing into the roll, oxidizing the (very thin) metallization, eventually raising ESR to the point where the capacitance doesn't exist. (This takes years to decades, AFAIK. Some datasheets provide temperature-humidity limits.)

So for long life applications under tough conditions, heavier metallization (lower ESR?) or foil may be desirable?

1x.3.12 -- gimmicks, may be worth mentioning PCB can be used this way as well. Can be varied at assembly time by jumpering to nearby pads, or by trimming copper outright. FR-4 tempco is quite nasty of course, as JL is fond of noting.

Footnote 53, ahh, you already preempted my comment from the last section! (The relation between L, C and v and Zo.) :^)

Cheers! Tim

--
Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Design 
Website: https://www.seventransistorlabs.com/ 

"Winfield Hill"  wrote in message  
news:qia8nk02bi9@drn.newsguy.com... 
> Here's another x-Chapter DRAFT section to examine 
> and think about.  This is 1x.3, about capacitors. 
> The x-Chapters are about parasitic aspects, etc. 
> Please report back with comments, suggestions, 
> and by all means, typos and errors. 
> 
> https://www.dropbox.com/s/q9jn6jeplmg9ler/1x.3_Capacitors_DRAFT.pdf?dl=1 
> 
> 
> --  
> Thanks, 
>    - Win
Reply to
Tim Williams

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