Can someone suggest a circuit to scale an analog signal (in the range of 0 - 16 volts) to a 0 - 5 volt range? Specifically I need to interface analog signals that could be in the 16 volt range to a DAQ card with ADCs with a range of 0 - 5 volts. Should this be a simple voltage divider? or should this be something more complicated? Are there off the shelf solutions to this type of issue? What about if the signal were in the range of +/- 16 volts?
Yes, you need to first, capacitively couple that signal to the AC mains. As the voltage on the mains rises up and down between, for example, -160V and +160V, *your* signal will similarly rise up and down.
So, for example, if your signal was 3.7V, you would see it rise up to ~163.7V and then *down* to ~-156.3V about 8 milliseconds later (all this assumes you are located in the US; if located abroad, the time involved will vary, as will the magnitude of the voltage swing. Consult an atlas for more details).
Now, as the signal bottoms out (e.g., at ~-156.3V) and starts on its' way back *up*, it will naturally be *compressed*. This is similar to the effect your body perceives when it gets to the bottom of a loop on a roller coaster and then starts to rise again (i.e., you feel "squished" into your seat).
So, if you *re*-capacitively couple this signal *back* to your DC reference -- make sure it's a different reference from the original one (otherwise you will short things out and bring about The End of The World!) -- you now have a *compressed* version of your original signal available.
Now, the tricky part!
You need to design a high speed computer that can determine exactly when the signal has been compressed the right amount.
*Then*, that computer triggers a sample-and-hold circuit to capture the instantaneous voltage *before* it has a chance to "re-expand".
Be very careful when designing this computer! If it is too slow, there is a risk that it will trigger the S/H circuit *late*! If, by chance, the delay is such that your signal is now at the *peak* of that 160V wave and just starting to head *down*, again, you run the risk that the signal will have *expanded* beyond its original 16V range -- just like you feel yourself being *pulled* out of your seat when you hit the apex of that roller coaster! Needless to say, this can cause all sorts of things to break as the rest of your circuit, no doubt, was not designed to handle the increased voltage!
Another solution is to put the entire circuit on that roller coaster so *everything* flies up and down at the same rate! Of course, now you're back to your original problem as that 16V signal will now be bouncing around just as much as the circuit that measures it!
That's why Engineering is so *tough*! Much easier to get a degree in Political Science. Or, Psychology. (something you might consider...)
Sorry I don't have much more time to spend on this. I've got to go buy some tent peg grease at the sporting goods store...
Depending on the input impedance of the ADC, a simple voltage divider should work. That input impedance is in parallel with the shunt leg of the divider and should be taken into consideration.
In addition to maintain frequency response, a small cap should be placed around each resistor of the divider. The time constant of each R-C should equal each other For example:
Assume the input impedance of the ADC is 100k and that you want to parallel it with 11K to make the shunt leg = 9.91k. Let the time constant be 5 microseconds. then C in parallel = 5usec/9.91k = 505 pF. Subtract the input capacitance to get the actual cap value, say 500pF.
This 9.91k resistance has five volts across it and the series leg has 16 - 5 volts across it. Rseries = 9.91 * (16-5)/5 = 21.8k
The capacitor across it has the same time constant, C = 5usec/21.8k = 229pf.
These numbers are an example for reference only. Of course the DAC circuit must be able to drive the divider impedance and series capacitance. Values may be rounded depending on the precision required.
Almost any combination of amplifiers and attenuators can do this. My preference is to attenuate first, then buffer-amplify if necessary, because the input attenuator can reliably give a 0V signal if/when the input is disconnected. The buffer amplifier offers a convenient place to do DC offset and overvoltage clampling functions if needed.
It's necessary to know impedance and frequency range (and possibly other things) about your 'analog signal' to really answer the question. If it's an automotive signal, that '16V' might have load-dump spikes (60V ratings are common here). The required precision is also important, and some kind of calibration provisions ought to be made in the input circuitry while you're at the early design stage.
But this is the point I'm trying to understand. Everyone simply says "be sure to match impedances" but not what this actually means. So using the diagram to help the discussion:
(I'm using Z for the dynamic impedance). Does it mean that Z_1+Z_2 should be of the same approximate magnitude as Z_adc? When you say "source impedance", do you mean Z_1+Z_2? Also, what I'd like to better understand is what are the issues if they don't match? For example, let's say Z_adc = 1M, then what happens if Z_1+Z_2 = 10K. How about if Z_1+Z_2 = 100M. These are the questions I'm trying to understand.
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