analog data link, with 6 to 12kV isolation

I need to make a simple analog data link, with 6 to 12kV isolation capability. By simple, I mean 0.1% resolution and 0.1% FS DC offset error, and maybe 20kHz bandwidth. The goal is a scope-ready signal for our electrospinning currents: 500nA FS, with less than 0.5nA noise and drift.

formatting link

I'm thinking of using an ads1202 delta-sigma modulator, and download its digital signal with an opi1268 coupler, good to 16kV. See the datasheets in the dropbox folder. We can run the modulator at 2MHz, the fastest speed the coupler can handle. I'd like to use a simple low-pass filter to convert the modulated signal to a DC voltage. This means reconstituting the signal, while avoiding problems from unequal rise and fall delays. But I have a simple signal coding scheme in mind for doing that.

--
 Thanks, 
    - Win
Reply to
Winfield Hill
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Hello Winfield

2 MHz might be at the low end of the modulator's abilities. It's supposed to handle down to 500 kHz at reduced accuracy, but the recommended range is 16 - 24 MHz for an external clock.

Rather than being speed-limited by specialized 16 kV optocouplers, consider pairs of TX/RX modules connected by a fiber. They can handle data rates more appropriate for 20-ish MHz operation. Your application does not seem to be very price-constrained, so a fiber pair may do it.

Connectorless receiver modules for plastic fibers like the IF-D97 or IF-D91B from Industrial Fiber Optics might be useful, together with matching transmitter modules. That way, the isolation is determined entirely by the fiber, which can have an arbitrary length, allowing a nice "any-kV" solution. It does not even have to be on one board.

To get rid of the risetime asymmetry, consider clocking the received signal into a D-flipflop driven by the master modulator clock. The clock can be generated on the LV side, used for the D-FF and sent to the HV side by one fiber to be used as an external clock in "mode 3" of the modulator. The data can travel back by a second fiber and be registered by the LV-side D-FF. That would reduce the asymmetry to negligible levels since D-FFs can be had with rather fast output risetimes.

Regards, Dimitrij

Reply to
Dimitrij Klingbeil

I'm thinking of using an ads1202 delta-sigma modulator, and download

P.S. While a pair of fiber modules does not need to be on one board, of course it still can. Nothing prevents installing a TX/RX pair connected by a short piece of plastic fiber all "inline" on the same board.

Reply to
Dimitrij Klingbeil

Always forcing two transistions per bit cell?

I'm using ADUM7703, isolating delta-sigma converter. But it's only good for 8KV isolation.

Do you think you'll get low enough noise? With a 2 MHz clock, the clock to bandwidth ratio is only 100:1.

You might clock it faster, and maybe use a fast fiber link for the data, as Dimitrij suggests.

I have a 2nd order delta-sigma Spice model if that would help sim the noise with your lowpass filter. I was planning to do the same thing, analog filter the delta-sigma stream for some signal scope monitor outputs, but then decided to have the FPGA drive serial DACs instead.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
jlarkin

iptechnology.com:

=1

yeh, from the data sheet:

"Effective resolution of 12 bits can be maintained with a digital filter bandwidth of 10kHz at a modulator rate of

10MHz"
Reply to
Lasse Langwadt Christensen

Being a cheapskate, always looking for minimum cost, I would sample the signal with an ADC (0.1% resolution would mean a 12bit ADC could do it)

Then feed the serial data over spiral coils in the PCB (separated by prepeg for isolation)

Then into a 12 bit DAC

I would use 12 bit ADC and DAC from an microcontroller

You could do this at less than 1USD for the entire system, and then you would have 2 "free" microcontrollers

Cheers

Klaus

Reply to
Klaus Kragelund

It is worth considering 1Gbit/s (or faster) SFP fibre ethernet modules. They can be used at much lower frequencies - limited by the 10nF coupling capacitors that are normally used on the copper interfaces. Many datacentres have now upgraded to 10Gbit/s so there are lots of

1Gbit/s modules on eBay for around $1. Don't be put off by multi-gigabit fibre-channel modules - they will work just fine for 1 Gbit ethernet and also work at much lower speeds if you want them to. The only downsides I can think of are size and power consumption.

There are various choices of wavelength and single/multi-mode. For your purposes it really will not matter as long as the wavelengths match at both ends. You should use single-mode fibre with single-mode SFPs, although for short lengths even getting this wrong doesn't seem to matter. Many MV of isolation and lots of bidirectional bandwidth for negligible cost is very attractive.

John

Reply to
jrwalliker

Looks do-able, but the optical isolator is a perhaps unnecessary bottleneck; laser-based optics is faster, and a SFP laser module and fiber, with a highspeed CD4046-variant as a V-F converter would be my first stab . With 2-to-20 MHz frequency range, the

20 kHz response after demodulating would be an easy target to hit.

I'm probably guilty of trying to fit the problem into the parts that reside in my junk collection...

Reply to
whit3rd

=1

Transmission line transformers can run a lot faster, and you can wind one o n a ferrite ring with 12kV rated coaxial cable.

That makes it a moderately bulky component, but they are fine until you get up to frequencies where the wavelength in the transmission line starts get ting down to the length of the transmission line - as you pointed out when I complained about the upper frequency limit I'd found on one I'd wound wit h twisted pair on an RM8 core.

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Bill Sloman, Sydney
Reply to
Bill Sloman

=1

To me this seems complex. Why bother with all these messy bits when a $4 C ODEC can be used at each end? I guess you would need to either convey four signals across the opto interface or use a simple, small $4 FPGA to encode the samples into a single data stream. 16 bits * 48 ksps = 768 kbps. @

96 ksps it's still only 1.5 Mbps. $8 at each end. Simple, small, inexpens ive, reliable and repeatable. Heck, at 0.1% accuracy and linearity you cou ld implement the CODEC in the FPGA as well.
--

  Rick C. 

  - Get 1,000 miles of free Supercharging 
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Reply to
Rick C

You know of a 12kV CODEC for $4?

Yes, my plan is to encode MCLK and MDAT into one line.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

Thank you, Dimitrij. Yes, you laid out the things I've feared and am hoping to avoid. But thanks anyway, for your specific suggestions for a good choice of fiber optics. You are right about the ads1202 not being suitable, besides the issue of its performance at low speed, its MCLK is divided by 2 internally, unfortunately killing my planned coding scheme, to combine a good clock edge with the data, and use a single optocoupler.

However, if I instead use the older ads1201, with its 1MHz max clock spec, and no divide-by-two, I should be able to resurrect my single-wire coding scheme, which will have a D-flop re-sync at the output. It'd be nice if I could run it at the coupler's 2MHz limit, but it'll probably be fast enough. And I can add Industrial Fiber Optics modules on a PCB extension, an option for use later on, in higher-voltage applications. For now I'm hoping for low parts count and small occupied area of the PCB.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

One of the d-s chips does Manchester, or you can make that with an xor gate. Manchester has no DC component and is easy to recover on the downstream side.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
jlarkin

Yes I thought of that, and it's mode 2 with the ads1202. But Manchester uses both polarities for its clock edge, which with unequal coupler delays, means distorting the duty cycle. I'm trying to avoid additional complexity, like adding a PLL to eliminate clock jitter.

There's another way to get a single line: Use the middle of my ads1201 external clock pulse to start an output pulse, whose length will depend on whether MOUT is 1 or 0 at the time. This should give me a jitter-free receiver clock, for free. :-)

--
 Thanks, 
    - Win
Reply to
Winfield Hill

OK, but that has a DC component so needs a DC-coupled link. And it would care about duty-cycle distortion too.

I invented a simple Manchester decoder when I was mostly young and stupid. I could probably remember that.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
jlarkin

Most opto-couplers are DC links. I'll use the low-jitter clock to reconstitute a good copy of the input signal, it only takes a D-flop, like the mini-Gate you like to use.

It's a good way to send digital data, to use with a digital filter, that be best, but I'm using an analog filter. :-)

I'm not happy with the ads1201, and old part, 5V operation, limited to 1MHz, in a big package, $20, etc. Newer parts, like the amc1204, $6 in an soic-8 look better, but the spec says 5MHz min. There's a 5Mbd OPI155, but it costs $66.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

how about a cheap mcu at each end? might be possible to use IrDa though it is suppposed to be max 115200kbaud for the simple 3/16 pulses

Reply to
Lasse Langwadt Christensen

If I do that, the ADC and DAC electronics is simple, and one $6 2Mbd 15kV opto-coupler would be fine. I just have to setup the controllers, and write code for each end. It's tempting, but no longer simple.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

The idea would be to reconstruct the absolute bit stream from the Manchester and lowpass filter that. The signal into the analog filter could come from a 1 ns Tiny flop, clocked at the rate that the d-s chip uses.

Coupler timing distortion would be ignored, up to the point where things break.

My current design uses a bunch of ADUM7703s clocked at 20 MHz. It's an SO8 with isolation, so I don't have a coupler problem.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Huh? Not sure what you are talking about. What is a 12 kV CODEC?

If you mean isolation, you don't seem to understand. I say CODEC for the g eneric ADC or DAC or a combination. The point is an ADC will easily produc e the accuracy you need in a digital stream. Most such devices need a coup le of signals to flag the samples and a bit clock. Not sure why I thought this would be four instead of three. But it is easy to combine them into a single bit stream at about twice the bit rate such as Manchester encoding.

But why a delta-sigma modulator instead of an ADC and DAC?

--

  Rick C. 

  + Get 1,000 miles of free Supercharging 
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Reply to
Rick C

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