I just noticed an advert for an ADC that runs at 170 MSPS, with a full-power bandwidth of 1.1 GHz. My understanding was that with an ADC at 170 MSPS, you'd want analogue filtering to ensure that no signal above 85 MHz reaches the ADC, since anything higher would be aliased to below 85 MHz. Are these things designed to work with a notch filter of width less than 85 MHz, precisely so that you can properly recover the frequency information after aliasing? Or am I missing something fundamental?
Probably. Some ADC's are designed to sample relatively low frequency modulation on a high frequency carrier.
It is possible that your ADC would be used with bandpass filter passing a band less than 85MHz wide somewhere above 200MHz. Since you haven't identified the ADC in question, this has to be pure speculation.
Consider radar. You send a pulse of X cycles at Y MHz. After a dealy, you get back a pulse at Z Mhz. The delay tells you the distance. The difference between Z and Y tells you the speed, or rather the portion of the speed vector that is toward/away-from the antenna.
--
These are my opinions, not necessarily my employer\'s. I hate spam.
An ADC is usually two parts. The front end is a sample-hold. Then comes what you normally think of as an ADC.
It's easier to make a high bandwidth S/H than it is to make a high speed ADC. Thus there is a market for chips that take advantage of the the aliasing trick.
--
These are my opinions, not necessarily my employer\'s. I hate spam.
I've forgotten the details of the ADC (it was on an advert somewhere), but IIRC it was from National Semiconductor. But that's probably the right explanation. It surprises me somewhat that you can get a good enough signal this way (especially if the signal is several times higher than the sample rate).
So if you're sending your radar pulses at 500 MHz, you have a bandpass filter for 460 - 540 MHz before the ADC, measure the aliased frequency, and then figure out what the original frequency (and therefore the frequency change) was? I guess you have to be a little careful about matching your bandpass filters and your sample rate, as frequencies a little above and a little below an integer multiple of the Nyquist frequency will get aliased to the same low frequency.
Having used similar ADCs - but within the Nyquist range - I remember seeing they are designed to sample a much faster (than the Nyquist) signal - generally, the carrier - which is used to recover the modulated signal which is below the Nyquist frequency. I have not looked into the maths behind that, though. IIRC you should look for "sub-Nyquist sampling" (although this is actually "above Nyquist", but this is what my memory is, 5+ years old and not quite certain). The theory should be easy to locate, though, this is how all wireless frontends seem to work nowadays :-).
The key word is "sub-sampling", where you sample a bandpass signal at well below it's center frequency. The Shannon-Nyquist theorem is about bandwidth, not the absolute value of the highest frequency.
Here's a little paper that may help out:
formatting link
--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com
Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
You can think of it as a ADC containing an RF mixer. You can down convert < (Sample Clock / 2) MHz wide chunks to baseband as part of the digitizing process. Those chunks of bandwidth can be anywhere up to 1.1 GHz. However, the downconversion will overlay EVERY 85 MHz chunk on top of each other in the 0 - 85 MHz spectrum (assuming 170 MHz clock). The resulting energy is not separable into its original chunks - aliasing is a non linear transformation. So you have to make sure only one chunk actually lands there if you want to be able to make sense of what you have. Hence the need for a very good bandpass filter around the signal of interest. All other signals and noise between DC and >1.1 GHz must be suppressed sufficiently to not be interferers.
This technique is often called undersampling, which gives the impression that it violates the Nyquist rule. It really does not, because Nyquist rule is a bandwidth criterion, not a center frequency criterion. As long as the bandwidth you want to preserve is less than (Sample clock/2), you are OK.
Some caveats to this downconverting technique : 1) the 85 MHz chunks have to be edge aligned on integral multiples of 85 MHz (or sample clock/2). 2) Alternating bandwidth chunks are spectrally inverted (85-170, 255-340, etc). this is not usually difficult to account for in the DSP. and 3) Sample clock phase noise and jitter requirements become more severe with higher input frequencies. Accurately downconverting a chunk from 1020 - 1105 MHz is much harder than 85-170 MHz.
The actual nyquist theorem only says the bandwidth of the signal must be less than half the sampling frequency. It doesn't say where that bandwidth lies. So we just want the bandwidth contained in a nyquist zone where conversion is acceptable.
Thanks for that explanation - you've added a couple of things that I was not sure about, but felt might be a problem (aligning the 85 MHz chunks, and the additional issues as you get higher in frequency compared to your sampling rate).
jOHN, i BELIEVE THAT YOU EXPLANATION IS RIGHT ON. tHE sAMPLE RATE IS 170 mc, THE FRONT END OF THE ANALOG PORTION SUPPORTS A "1.1 GC FULL POWER BANDWIDTH"... means just what they say, so for repetitive signals you can sample at 170 mc, 1 1 gc sine wave and by slipping the sample timer every 16 cycles or so, you can re conconsruct 1 gc sine wave by asmebling seeral scans of the 170 msps data....
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here.
All logos and trade names are the property of their respective owners.