Accuracy of log sweeps

For the properly designed generator, the accuracy of instantaneous phase along the sweep should be determined by the accuracy of the generator clock.

That depends on the Time x Bandwidth product of the sweep. You may have to do 64-bit or even more accurate math.

Vladimir Vassilevsky DSP and Mixed Signal Designs

If it means anything, My rigol requires you to set the center frequency and I believe that menu is only there if you select LOG for the sweep, there is also a start and stop, of course. There is also a form of freq steps you can set.. So I think the log sweep should follow with the start, center and end freq settings.

That's my two cents worth!

Jamie

That would be the case when generating a fixed frequency, i.e. there is a constant value that is added to the phase accumulator at each clock cycle.

Unless you can update the _addend_ register (by calculating new values in the fly or from a precalculed RAM buffer), you are going to get a staircase waveform approximating the wanted sweep.

Some RF DDS chips have only a serial input for the addend register and the serial clock might be much lower than the master clock, so it may take hundreds of master clock cycles, before a new value can be loaded into the added register, thus the DDS frequency is stable for that period of time and the frequency error depends of the steepness of ideal waveform at a particular frequency.

With a FPGA construction of your own, you might put also the addend register into a NCO loop, i.e. add a very small (frequency change) value at each master clock cycle into the addend register (which of course is added to the DDS main phase accumulator). This way the small frequency change rate register needs to be updated at a slower rate.

If the sweep rate is relatively slow, frequency points could be interpolated so the log generator wouldn't have to be as pipelined.

That's a linear interpolation- could be calculated from two frequency points divided (shifted) by a factor of, say, 8. There might be better ways.

Best regards, Spehro Pefhany

Of course, if you want to tailor it to a specific set of profiles, you can input the difference (read: finite differential) equation as logic and let it do its thing.

An exponential frequency sweep would be easy (addend(N) = addend(N-1) * rate constant), as would linear (constant difference) and quadratic (linear difference). And many other profiles. You could use chaotic equations for spread spectrum or encryption. Hmm, patent pending, you heard it here first. ;-)

One could select between these as a simple ALU, including one-shot initializations for standard programming methods. Then SPI or something and you're set.

Tim

Ideally, instantaneous phase should be correct at every sample along the whole sweep. No matter what waveform is. No matter how do you generate it.

Then approximate the phase in equiripple manner; so the phase error won't build up along the sweep.

thus the DDS frequency is stable for that

The goal is get the phase as accurate as it could be done within limitations of hardware.

VLV

This is very inaccurate. Precision is lost at every iteration.

The right way is calculating phase at every point as closed form equation.

Poor accuracy guaranteed.

VLV

Thanks for comments everyone. @upsidedown.... Since the DDS is in the FPGA I can update the phase increment every sample.

While I agree with Vlad that the *best* way would be to recalculate a closed form equation for each sample step the cost in FPGA area is excessive.

Spehro's linear interpolation looks OK at first but for a 1000 step look up table and a 3 decade sweep the peak error is about 6ppm and that seems a bit too rough. I cant see any ripply errors on my cheapo Rigol function generator.

Tim's repeated multiply is my current favorite. The multiplier is always of the form 1 + x where x is usually very small and can (by some restrictions on sweep width be guaranteed to never be >= 1. For a x2 sweep with 2.5e8 samples (my current worst case) you need to use at least 64 bit fixed point arithmetic but some cheating is possible because of the 1+x form of the multiplier. It's not too onerous in my case to go up to 96 bit maths which I'll do if I have to because I don't want the maths to limit the performance.

Michael Kellett

Integer math is exact. If you were thinking floating point, well... I don't know why you would?

Easy to specify start and end points (real number) and solve for nearby actual (integer) values the procedure will generate. If that's what you meant by precision or accuracy, then add more bits. You'll be using far more gates trying to compute a function from nothing each cycle, that would be ridiculous.

Is that not what the recurrence relation is? Often...by definition?

Are there any existing DDSs that do that? By definition...no.

Poor accuracy... replies?

Well, this is Usenet, so I'll give you that (note: reciprocity applies ;) ).

Tim