2-terminal negative resistance circuits

Eric, I'm not sure your listed email is valid, could you email me at snipped-for-privacy@yahoo.com? Thanks!

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 Thanks, 
    - Win
Reply to
Winfield Hill
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Who needs women in one's life when senior citizens can provide the same amount drama at a much lower price! Cat fight! Cat fight!

Reply to
bitrex

OH NO HE DI-INT

Reply to
bitrex

They seem to be the option of choice for CMOS oscillators (or VCO) nowadays. Have a look at

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and the following papers in the series for an introduction to it.

Pere

Reply to
o pere o

Like I said, I may envy John Larkin's capacity to make money out of what he does, but it's not the kind of work I'm good at, liked and used to get paid for, so I'm not actually envious, or resentful.

John Larkin has found his niche, and it suits him. There are all sorts of ecological niches, and evolution has thrown up creatures who can exploit them. I'm definitely not going to try to compete to exploit his particular niche.

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Bill Sloman, Sydney
Reply to
Bill Sloman

Granting that krw and Cursitor Doom pretty much corner the local market for envy and resentment, "rightism" might be a better summation.

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Bill Sloman, Sydney
Reply to
Bill Sloman

Yes, except one cat just keeps moving forward getting things done while the other acts like a kitten pawing at his heels.

Mikek

Reply to
amdx

Cats don't have heels. This user group has more than it needs.

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Bill Sloman, Sydney
Reply to
Bill Sloman

More of ignore-ance.

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Bill Sloman, Sydney
Reply to
Bill Sloman

Fun thread! Can someone explain (hand waving is fine) what the pnp is doing in the above circuit? I can understand the classic lamda diode. Here,

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And keep trying to see the pnp as some current source.

George H.

Reply to
George Herold

No, the PNP is an emitter follower with a low output impedance toward the FET. A low V1 produces a low J1 source voltage, the FET is on and draws current. When the V1 voltage rises, the PNP emitter and the FET source voltage rises too, the FET sees a lower Vgs and cuts off, so the total current drawn diminishes. Hence, the negative resistance effect. When the FET is fully cut off the remaining impedance is only R1 + R2.

Arie

Reply to
Arie de Muynck

(My description is for the

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link).

Reply to
Arie de Muynck

In

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I see the circuit differently, not as a lambda diode. T1 (FET) is a high input impedance voltage source follower, T2 (PNP) is a grounded base amplifier with a high impedance current output. There is no phase reversal. The gain is set by varying the FET Vgs, changing its transconductance.

Arie

Reply to
Arie de Muynck

Thanks Arie, that makes sense. GH

Reply to
George Herold

OK, (not everything on the web is right. :^) The 47 pF capacitor does seem to change the coupling.

George H.

Reply to
George Herold

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