This saves a relatively expensive EclipsLite flipflop. The delay line could be a squiggly pcb trace... it's not super critical.
Version 4 SHEET 1 880 680 WIRE 64 -32 -80 -32 WIRE 256 -32 160 -32 WIRE 416 -32 336 -32 WIRE 64 0 32 0 WIRE 192 0 160 0 WIRE 32 32 32 0 WIRE 192 32 192 0 WIRE -80 160 -80 -32 WIRE 32 160 -80 160 WIRE 176 160 32 160 WIRE 32 208 -80 208 WIRE 176 208 32 208 WIRE 416 208 416 -32 WIRE 416 208 352 208 WIRE 464 208 416 208 WIRE 480 208 464 208 WIRE -80 240 -80 208 WIRE -80 368 -80 320 FLAG -80 368 0 FLAG 32 32 0 FLAG 192 32 0 FLAG 464 208 OUT FLAG 32 208 CLK FLAG 32 160 D SYMBOL Digital\\dflop 256 112 R0 WINDOW 0 -13 -35 Left 2 SYMATTR InstName A1 SYMATTR SpiceLine Td=300p SYMBOL voltage -80 224 R0 WINDOW 0 52 70 Left 2 WINDOW 3 24 119 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 0 100p 100p 400p 1n) SYMBOL tline 112 -16 R0 WINDOW 0 2 -80 Bottom 2 WINDOW 3 4 -66 Top 2 SYMATTR InstName T1 SYMATTR Value Td=1.2n Z0=50 SYMBOL res 352 -48 R90 WINDOW 0 -40 56 VBottom 2 WINDOW 3 -35 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 50 TEXT 478 337 Left 2 !.tran 20n TEXT 472 24 Left 2 ;1 GHz Divide by 4 TEXT 456 64 Left 2 ;J Larkin Dec 17, 2014