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What's amiss here? (R/C constant)

Hi guys,

It's been a while since I messed around with LTSpice but I don't remember e ver encountering such a basic problem as this; trying to simulate a cap cha rging through a resistor and getting a result which shows the cap fully cha rged right from the get-go! I must be making a really dumb mistake here but I cannot seem to figure out where! Can anyone spot what it is? (I'm ready for this to be seriously embarrassing....)

"ExpressPCB Netlist" "LTspice IV Version 4.17"

1 0 0 "" "" "" "Part IDs Table" "C1" "100µ" "" "R1" "1000" "" "V1" "10" ""

"Net Names Table" "N002" 1 "0" 3 "N001" 5

"Net Connections Table"

1 1 1 2 1 2 1 0 2 1 2 4 2 3 2 0 3 2 2 6 3 3 1 0
Reply to
orion.osiris
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encountering such a basic problem as this; trying to simulate a cap charging through a resistor and getting a result which shows the cap fully charged right from the get-go! I must be making a really dumb mistake here but I cannot seem to figure out where! Can anyone spot what it is? (I'm ready for this to be seriously embarrassing....)

I didn't bother to run that however, I think your problem is the way you operating it.

In the simulate menu, for the transient, you have the option of starting the DC supply at 0.. otherwise, it shows the results when DC operating point is reached and it could show that you have a fully charged cap.

What you should do is use a pulse source (voltage)with a little start delay as the source for the charging node. This way you'll be able to see the actual event on the sweep, otherwise, you get a fully charged cap because the Ltspice is doing that if you don't use the start at 0 voltage option, then you'll have the problem of the ramp up getting in your results.

Jamie

Reply to
Jamie

Jamie, you were right. However, I don't recall LTSpice working in this way when I was using it with a passion some 10 years ago. Perhaps the new version I have downloaded has been tweaked to make this the way it works now, as opposed to how it used to be?

Anyway, thanks for your assistance!

Reply to
orion.osiris

schrieb im Newsbeitrag news: snipped-for-privacy@googlegroups.com... Hi guys,

It's been a while since I messed around with LTSpice but I don't remember ever encountering such a basic problem as this; trying to simulate a cap charging through a resistor and getting a result which shows the cap fully charged right from the get-go! I must be making a really dumb mistake here but I cannot seem to figure out where! Can anyone spot what it is? (I'm ready for this to be seriously embarrassing....)

Hello,

You should use the TRAN-command with "uic" when you want simulate this RC circuit with a DC-source.

.tran 10m uic

Now LTspice will start the timing simulation in the u(n)-i(nitialized) c(ondition). This means it doesn't calculate the DC operating point.

Best regards, Helmut

Reply to
Helmut Sennewald

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