Finally zeroing in on modeling the 74HC4046 after finding a unpublished AppNote that gave more details on the innards. This is what a fixed frequency looks like, simulation-wise...
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Comments? Scalings? (This is based on AppNote and Datasheets claiming trip at VDD/2).
First release will be VCO only and will be in LTspice format. Once you approve that, the PFD is virtually all logic. ...Jim Thompson
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| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
Funny. I put a HC7046 into a design recently. Unfortunately there are no design tools for calculating the loop filter components. So how about modeling the HC7046? It is much more interesting because of the lock detect output which can be used as a reset.
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Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
I investigated all the HC versions (HC4046 from several vendors, HC7046, HC9046) about a year back, iirc, and their oscillators are all junk compared with the ancient metal-gate 4046. They're horribly nonlinear, all in different ways, which makes it really hard to build a good PLL. What's worse, their oscillators quit when their control voltages are within a volt or so of ground (the actual threshold for misbehaviour varies from device to device).
The 7046 is enough more expensive that I'd be much happier spending the dough on a better oscillator, and using the back end of a normal HC4046 from a good vendor.
Phil, What sort of non-linearity are you seeing? All I can think of is perhaps using non-cascoded current mirrors, or just using a gross un-boosted follower. Is it just a bow in the control curve, or are you seeing bow in the capacitor charging voltage? ...Jim Thompson
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| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
The metal gate version works over about 1000:1 range, and is very respectably linear--a few percent IIRC, which is much better than good enough for inside a PLL. It's really quite pretty in a small way.
The HC parts' nonlinearity is all over the map depending on the vendor, and that messes up the loop dynamics really badly. Spicing the HC4046 oscillator will definitely be "a trap for young players", as Dave Jones says.
With the loop gain varying 3:1 with control voltage, and the centre frequency being a very poorly controlled function of the RC, you have to make HC4046 loops ridiculously overdamped in the normal case to avoid loop instability. If you're using lead-lag compensation, you have to put the zero a factor of at least 5 below the nominal unity gain cross, whereas with a well-behaved VCO, you can put it right at the unity gain cross and have 45 degrees' phase margin.
I'd far rather use an OTA integrator/Schmitt trigger oscillator or something like that, with the 4046 PDII.
The HC4046 has its uses, but not nearly as many as if it were really a faster CD4046.
I wish someone would take the 3-state phase detector from the 4046 and put it into a 6-pin SOT and call it TinyLogic or whatever. It would save ever so much board space.
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Tim Wescott
Control system and signal processing consulting
Operational transconductance amplifier, e.g. an LM13700--basically a bunch of current mirrors, controlled by a diff pair so that you can set the tail current of the pair and the output is a current source equal to delta I_C, which pulls almost to the rails. You hang a cap on the output, buffer it with the built-in Darlington, and feed that into a Schmitt trigger, which can be made from the other half of the LM13700 in a pinch. The Schmitt switches the diff pair of the integrator stage, so you get a reasonably decent triangle wave with a slope proportional to the current you program the OTA integrator with. Works well at low speed, over a wide range, and the component count is lowish.
Agreed. But it would cost a bunch more, because the 4046 is the jellybean.
We build something like the charge-pump detector into FPGAs. We use an external dual schottky diode for the pump-up and pump-down blips, to avoid the deadband that tri-state charge pumps tend to create. We can also delta-sigma those outputs to control our VXCO open-loop.
The little function generator chips make nice wide-range, low frequency VCOs. Exar, Maxim?
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John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
And there used to be a fairly wide range of chips available that were designed to be very linear VCOs, intended for use as voltage-to- frequency A/D converters. Analog Devices still seems to be in the business
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Phil Hobbs probably should be using the AD650 - though I can't recommend it on the basis of personal expereience
Fifteen bucks for a 1-MHz V-F converter? Not me, especially not inside a PLL where 1% linearity is way better than good enough.
I'd happily use a metal-gate 4046 at frequencies where they work--all you need is a resistor to ground from the PD2 output to pull it off the dead zone.
Above a megahertz or so, a current-programmed triangle wave oscillator is good, or else a linearized LC VCO. You can get linearities of better than 10% in varactor-tuned VCOs by putting in a couple of off-stage resonances.
The point was that these are legacy parts, and correspondingly expensive. The LM331 which offers even better linearity, but only goes to 100kHz, turns out to be still available to, but at $6 each in small quantities. I was rather hoping to provoke a response from somebody who is still using that kind of part.
Sure. A 1GHz gbw op amp could take you quite a way above 1MHz.
Messy. I'd be thinking of a digitally controlled Direct Digital Synthesis chip, which would be a lot tidier and would probably have a lower jitter (if you low-pass filtered the synthesised sine wave properly). For a seriously low jitter option, a DDS-like system including an MC100E195 might be interesting - if complicated. Coping with the temperature dependence of the delay through the MC100E195 might require Peltier junction or a self-calibrating scheme if you really wanted to exploit the full capacity of the MC100E195.
Taking note that I'm not a logic designer, I'm not sure your version covers all states. It took Ron Treadway NINE gates back in the mid-60's in the MC4044...
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...Jim Thompson
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| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
Digital PLLs don't have the performance of analogue ones, and are far, far more complicated and power hungry. My usual use for PLLs is demodulation rather than frequency synthesis, so DDSes are pretty much beside the point.
You can get inductors in 2% tolerances, and the varactors of course are variable (and also good to +-5% to 8%), so you don't need tweaks to get a very respectable linearity improvement. That means that you can be more aggressive on the loop compensation, and the improved performance is worth a lot.
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