newbie question help: L-Edit / Cadence layouts for MEMS/MST

Hi All,

I have some basic newbie questions about microfabrication with respect to MEMS designs (a course I am taking). I hope this is the right forum for these questions. (If not, I apologize):

  1. Using Cadence or L-Edit with the appropriate technology files (3-layer Polysilicon - PolyMUMPS), is it safe to say that the layers available in L-Edit are really the masks (as compared to the actual material design layers)? So when you send a MEMS layout to CMC (or elsewhere) for fabrication, the submitted layout really reflects the masks. So as I understand it, the fab will automatically deposit _complete_ layers of your sacraficial layers and your structrual layers uniformily across the entire wafer so when designing your MEMS structure in L-Edit, the different layers are the MASKs that are going to pattern each layer. Is that a correct interpretation?

(I guess the confusing thing for me is that the PolyMUMPS handbook using the convention where the masks are in uppercase (POLY0, POLY1, etc) and the actual design layers only have the first letter capitalized (Poly0, Poly1, etc). And L-Edit, when using the PolyMUMPS technology file, has the layers indicated as Poly0, etc implying that they are the actual material layers .... but aren't they the actual masks that are used to pattern the sacraficial and structural layers?)

  1. In L-Edit with the PolyMUMPS tech file, it has a Silicon nitride and outline masks. When would you use Silicon nitride? I understand that it can be used as a sacraficial layer and additionally, its the first layer on the wafer (irregardless to prevent charge feedthrough), but if my intrepretation is correct above, the tools allows you to specify MASKs not the actual material layers so where/why would Silicon nitride be available as a mask?

  1. In the same manners as #2, how about the outline layer/mask that's available on the left hand side of L-edit? I presume since you are specifying masks layouts (to pattern the material layers), that the masks, depending on your design won't span the full dimensions of your device, so the outline layer/mask just allows you to put some boundaries on your layout. Is this correct? Any other reasons?

  2. With regards to the various masks (POLY0, DIMPLE, ANCHOR1, POLY1, ANCHOR2, P1_P2_VIA, POLY2, METAL), is it correct to say the structural masks (POLY0, POLY1, POLY2, METAL) use the subtractive pattern transfer lithography process where these masks determine the dimensions of the underlying structural material that _remains_ after etching.

And the DIMPLE, ANCHOR1, ANCHOR2, P1_P2_VIA masks use the additive pattern transfer lithography process where these masks determine the dimensions of the underlying sacraficial layer that is to be _removed_ by etching.

Is this correct?

  1. I also noticed that the PolyMUMPS handbooks indicates that POLY0 could be HOLE0. Is this an example of where the designer can use an additive pattern transfer lithographic process on a structural layer to specify the dimesions of the structural layer to _remove_ (instead of retain)?

Thanks in advance for any and all feedback!

Michael

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Michael
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