It's Official... PSpice Schematics v10.3!

Change ISPs ?:-)

It was just a screen shot of v10.3 showing markers and bias indicators still functioning.

Only a big deal if you're in to PSpice Schematics as a front-end.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

[snip]

Whoopy Doo!

It's been in PSpice as long as I can remember. The problem was one of whether OrCAD/Cadence was going to continue its support, or whether a bunch of us would bail to another simulator.

Please don't start about simulators that I consider to be toys... this is a documentation/how-I-earn-my-living issue.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

Did they add anything new or is it still the same?

Mark

--> I remember seeing a free (read only) binaries news server on this site' listings. Please search

--
Chaos Master®, posting from Brazil.
"It\'s not what it seems, not what you think. No, I must be dreaming."

http://marreka.no-ip.com  | http://tinyurl.com/46vru 
http://renan182.no-ip.org | http://marreka.blogspot.com (in Portuguese)

OOPS! Newzbot seems to be down!

-- Chaos Master®, posting from Brazil. "It's not what it seems, not what you think. No, I must be dreaming."

| | (in Portuguese)

It must take you a long time to do worst case analysis (i.e., Monte Carlo simulation) by hand. :-)

My ISP doesn't think there is such a group and Deja doesn't archive the binary groups. How do I view that group?

--
--
kensmith@rahul.net   forging knowledge

What simulators (other than PSpice) you consider that *aren't* toys?

[]s

--
Chaos Master®, posting from Brazil.
"It\'s not what it seems, not what you think. No, I must be dreaming."

http://marreka.no-ip.com  | http://tinyurl.com/46vru 
http://renan182.no-ip.org | http://marreka.blogspot.com (in Portuguese)

This has been in SuperSpice for quite some time. :) :)

Melvin Stevens

For sim. I use LTSpice. For product schematics, I use Orcad for DOS. For me, Spice is mostly about checking my math.

--
--
kensmith@rahul.net   forging knowledge

Don't know yet. I was waiting for Schematics confirmation before I laid down my bucks.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

"Simulators" was a bad choice of words. The real issue is user interface... the schematic entry... then the post processing of data so that it's like looking at a lab scope.

Schematic entry is where most fall apart, clumsy to use. Also many can't do an adequate job of hierarchical structures.

I can draw a schematic using PSpice Schematics about as fast as I can with a pencil, which is why I swear by it so much... every motion is intuitive and natural.

And it seems the more expensive they are the klutzier they get ;-)

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

OOPS! Newzbot seems to be down!

-- Chaos Master®, posting from Brazil. "It's not what it seems, not what you think. No, I must be dreaming."

| | (in Portuguese)

dp-news.maxwell.syr.edu carries abse, you cannot post, however.

Regards Ian

Fair enough, but I think that Monte Carlo analysis (assuming you set realistic tolerances on each component's parameters) is representative of what happens in the real world... although, OK, maybe if you're not the 'least liked' guy on the manufacturer's list!

Many simulators have a 'Yield' option that's effectively Monte Carlo analysis where they also let you set guidelines for what a 'passing' or 'failing' circuit response is and then collect statistics about your yield. Although obviously it would be nice if you could design circuits that always had a 100% yield, this tends to become increasingly difficult as you starting doing higher and higher frequency design and they are so many variables (such as the relative premeability of your PCB's substrate) that are difficult or merely expensive to precisely constrain. For some designs, it's cheaper overall to accept a lower yielder with 'looser' parts than require tighter tolerance components.

I guess my point here is that while I'd readily admit that the average design out there probably could obtain a higher yield with no significant change in cost, there are also times when it's entirely reasonable to accept a lower yield just so that you can ship the @#$%@# product and get on with life. I've heard that the IC yields on high-end 3D graphics chips are abyssmal -- around 10% -- yet clearly there's a demand for them and it'd be absurd to suggest that they simply shouldn't be manufactured unless the yield could be increased.

BTW, I suspect that if you simulate any of those chips with the absolute worst case tolerances on all the components the yield drops to 0%.

---Joel

Oh dear...I expected more you. Why on earth do you want the output to look like a real scope? This is the thing that makes it for the kiddies, like the play bench electronic workshop. Secondly, PSpice doesn't do that anyway. Its graphing is *not* a real time scope, so you seem a bit confused in your old age.

SuperSpice has a brilliant GUI.

In what way?

As is SS. The reality is, Schematics is a bit long in the tooth. It misses quite a lot of features, although I agree, itd better that anything else out there, apart from SS that is.

Kevin Aylward snipped-for-privacy@anasoft.co.uk

SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.

Joel,

There's been some discussion on how to do Monte Carlo on the LTspice users' group,

--Mike

Yep. The real game is to test BEFORE packaging, so the throwaway cost is minimal... just like your Cheerios, the biggest cost is in the packaging ;-)

In the IC business we have an advantage called _ratioing_, resistors may be 30% low, but so what, they're ALL low.

Performance in a GOOD analog circuit design depends primarily on ratios.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.

But that isn't "worst case". The real worst case is that all the parts are at the worst extreme that the maker allows to be shipped to the customer they like the least. ie: the parts I will actually get in production.

It takes surprising little time to do a real worst case check on a circuit. In a good design there is always a safety margin so all you have to do is prove that there is still some margin not the exact amount it will be.

Spread sheets calculate fairly quickly even under Windoz.

--
--
kensmith@rahul.net   forging knowledge

Yes, this is one definition of WC, the one I use, and of course, SS does this automaticaly with a couple of button presses in the GUI.

The other definition is when components have been adjusted to give the max/min voltages and currents, which is not the same, but you hope they are.

If its done in a simulator, indeed. Doing it by hand is essentially, impossible. You cant even get a closed form solution for a general 1 transister circuit, let alone one with 50 or 1000 of the buggers.

Well, absolute proof is not possible. A WC may be 3 or 6 standard deviations from the norm. There is always a probability of violations of these limits. Not everything is tested and culled to its stated limit.

Ahmmm...

Kevin Aylward snipped-for-privacy@anasoft.co.uk

SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.