Circuit Challenge of the Day

Circuit Challenge of the Day

The following circuit...

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is a ramp generator.

It is easy to see how the upper trip point circuitry causes discharge of the ramp.

But what causes the turn-around at the bottom? ...Jim Thompson

-- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

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| 1962 | I love to cook with wine. Sometimes I even put it in the food.

Reply to
Jim Thompson
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As the collector current of Q1 drops to zero, its VBEsat drops below the level needed to keep Q4 turned on, due to that 200 ohm resistor dropping

100 mV.

Cheers

Phil Hobbs

-- Dr Philip C D Hobbs Principal ElectroOptical Innovations

55 Orchard Rd Briarcliff Manor NY 10510 845-480-2058 hobbs at electrooptical dot net
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Reply to
Phil Hobbs

Shhhhhh !-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
                    Help save the environment!
              Please dispose of socialism properly!
Reply to
Jim Thompson

Huh...

Q6 should "never" turn on, since it's hooked to a "current mirror". Q5 and Q7 Vbe's match Q6's, so it would only turn on if Q7 Vce = 0.

Of course, at Vce = 0, beta is shit, so it's no longer a "current mirror" either.

That, and as Hobbs said, make this a confusing circuit to anyone who thinks "Vbe == 0.7V".

I forget if Eber-Molls even models Vbe vs. Ic.

Tim

-- Deep Friar: a very philosophical monk. Website:

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Reply to
Tim Williams

You need to spend some time refining your circuit analysis/design tools.

Don't give up your day job ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
                    Help save the environment!
              Please dispose of socialism properly!
Reply to
Jim Thompson

I had to redraw the damned thing before it became clearer to me. Like this:

Q6 will turn on. C1's voltage will continue to rise from the current mirror's current (set by R7) until Q7's collector rises high enough to pull Q6's emitter above it's base, enough to turn it on. [I expect somewhat imperfect current mirror behavior (modified by the Early effect, since Q5's collector stays about the same voltage but Q7's moves up and down over quite a range.)] Anyway, Q6 should give a little kick of current driven into R2, taken from C1, and this should turn on Q3, which turns Q2 off, allowing R3 to pull up Q1's base and then dumping the heck out of C1. Q4 gets to help hold Q2 off, too, until, as Hobbs said, R5 pinches it's Vbe and winks it out.

I actually like the way it works. I just didn't like the way Jim drew the darned thing.

Jon

Reply to
Jon Kirwan

Years ago I put together a circuit for messing with random inductors, it was based on a bistable and the "off" state was tripped by the rise to saturation current in the driver transistor. The fun part was sensing when the flyback voltage had peaked and was on its way back, to trip the bistable on state.

The circuit would be easily recognisable if I could find it - it was a dead bug/bird's nest type thing, but it seems to have vanished without trace - I'm pretty sure I documented the development, but I can't find that either.

Reply to
ian field

Sounds a bit like a Royer converter.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058
hobbs at electrooptical dot net
http://electrooptical.net
Reply to
Phil Hobbs

I still don't quite like it -- I'd like to see Q3 and Q4 together, since they're basically an RTL NOR gate (Q4 having a peculiar turn-off voltage). Then invert it with Q2, feed back to Q4 and drive Q1, and you have your driver part, from left to right.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Well, draw it up the way you'd like. I'd love to see that, if you can afford the moment to do it. Honestly. It might help me do a better job thinking about other things to see a little better about redrafting stuff like this. Anyway, I'd appreciate your shot at it if you feel like trying a hand at it. (I don't agree about your wish for Q3 and Q4, right now, but if you draw it up the way that makes better sense to you I might change my mind about it and learn something.)

Thanks, Jon

Reply to
Jon Kirwan

Tools? What, did you actually think I'd waste a simulation on your silly ideas? ;-)

BTW, my "day job" is doing well: I've already sold a number of induction heater kits. :-) See the latest update on my website.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

"Silly ideas"? That circuit in I/C form, more than thirty years ago, was in several different automotive ignitions.... used to time dwell. In I/C form the ramp started essentially from zero (I could scale transistor areas). In I/C form it was triggerable rather than continuous, thus no R2, Q3, Q6.

That was a circuit I remembered, wanted to use again, pulled it from archive, then couldn't figure out how it worked ;-) Stewing over it, finally it dawned, so I made it up as a teaser to see if anyone could figure it out. So far only one person :-(

...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
                    Help save the environment!
              Please dispose of socialism properly!
Reply to
Jim Thompson

Oh, more than one person. But you don't read my posts. So you wouldn't know. Regardless, I enjoyed this thread from you and thanks for adding it.

Jon

Reply to
Jon Kirwan

Q1 (and Q4) get turned on when the ramp reaches its peak. Q1 discharges C1. When the voltage on C1 drops low enough, Q1's Vcb (a reverse biased diode) gets forward biased. That causes Q1 to bogart all the base current flowing through R3, leaving none for Q4 and it turns off.

--
Paul Hovnanian  paul@hovnanian.com
----------------------------------------------------------------------
Have gnu, will travel.
Reply to
Paul Hovnanian P.E.

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