high Z-in comparator/follower

As no-one responded to my original post, I breadboarded this system with puzzling results. Basically the ICM7555 works reliably as a window comparator, except that its first couple of cycles after system power-up appear to stick ON (aka output low, discharge transistor on) until it feels like turning off. Once it gets over this intialisation stage it is great.

I presume that it is due to the flip-flop not being flipped (or should it be flopped?) for some reason, but I'm buggered if I can see any difference between those first couple of input transitions and the rest of them when it goes like a train.

TIA for any constructive suggestions.

Once

a

The timing capacitor(s) is (are) fully discharged on power up. Timing is off, until they go through a full cycle. Look at the datasheet and you'll see the comparators trip at 1/3 and 2/3 of VCC.

--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

comparator,

ON

Once

between

like a

Capacitors? What capacitors? I'm using it as a window comparator. Would have used an op amp except this requires less external components and therefore better fits my v.tight footprint condition. (see O/P)

Input to 2/6 via 100K. Output drives load circuit. Discharge terminal pulls down a LED separate from the main output/load.

Yep, I know when they trip. The thing obviously starts up indeterminate when power is applied to both the 7555 and the source equipment simultaneously. I have often been suspicious of the trigger behaviour as described in the various data sheets. This behaviour isn't improving my level of suspicion.

The intial state of the F/F on powerup doesn't seem defined, presumably because that's not pivotal to "normal" uses as a mono/astable etc. But given that this chip is (mis-)applied in such a vast number of configurations, maybe powerup status IS a spec that should be defined.

BTW, tnx for dropping down to "aus.*" from S.E.D.

Once

a

Try the following 7555 configuration Smoky :

Connect pins 1 and 2 to ground. Connect pin 8 to +ve supply. Connect your input to pin 8. Use pin 3 as output.

This uses the RESET function of the 7555. Pin 4 is a high impedance input with a typical threshold around 0.6V (Intersil).

the

comparator,

ON

Once

between

like a

(Intersil).

CORRECTION !!! Connect your input to pin 4 (not pin 8 !!!!!)

tight

the

comparator,

stick ON

Once

between

like a

(Intersil).

Interesting possibility. Looking at the truth table on p4 of Intersil's data sheet, that would seem to work assuming the input impedance is hgh enough - couldn't see it specified anywhere.

As an aside, I substituted an NE555 in place of the ICM7555 and the power-up glitches disappeared. Now THAT is puzzling.

tight

TinyLogic

but the

2. > >> > >Discharge (7) or Out (3) will serve as output.

comparator,

stick ON

off. Once

be

between

like a

(Intersil).

High Z = low current Look at page 4, in the table at the top. "Reset current 10nA (@25degC)"

Also, from page 6...... "The RESET terminal is designed to have essentially the same trip voltage as the standard bipolar 555/6, i.e., 0.6V to

0.7V. At all supply voltages it represents an extremely high input impedance."

You asked for help, so please try my pin 4 RESET configuration suggestion with a 7555 and see what happens.

Connect pins 1 and 2 to ground. Connect pin 8 to +ve supply. Connect your input to pin 4 - RESET. Use pin 3 as output.

tight

TinyLogic

components

but the

2. >> >> > >Discharge (7) or Out (3) will serve as output.

comparator,

stick ON

off. Once

it be

between

goes like a

(Intersil).

OK

I follow what you suggest. I asked for suggestions regarding MY proposed configuration. After my first post, the boards were made anyway, and are now populated with NE/SE555 chips (rather than the CMOS version) and percolating nicely as required. To try your configuration would now require hacking a working board to see if it does what we both expect, which in any event would be no advance on where we are.

But thanks for your input, it is appreciated.

very tight

TinyLogic

components

but the

and 6.

with

comparator,

stick ON

off. Once

it be

difference between

goes like a

(Intersil).

data

power-up

be

Understood.

No worries.