Hello, Expertise in 4000 series logic family is needed here. I have a timer application where I need to count to eight hours and twenty four hours and then reset and start again. I'm using an Epson crystal clock IC at 32786Hz and dividing it down with a CD4020 14 stage ripple counter to give 2Hz at the 14th stage, then I feed that to the clock pin of a second CD4020. A 1Hz or 1 second clock "tick"then appears at the output of the first stage. The other 13 stages continue dividing until the 14th stage output finally goes low at something like 2.27 hours after the start. Is there any reason why I shouldn't add a third CD4020 to the chain to further divide the time? I know about decoding selected counter outputs with simple hardwired diode gates to pick off the exact elapsed times I want. The only question is whether there could be any problems with cascading three CD4020's?
I realize this approach is about forty years out of date and it could probably be done far more elegantly with a single suitably programmed PIC or similar processor. But I know exactly nothing about PIC programming and I do have plenty of ripple counters in the parts box. Peter.